Datasheet

PIC12C67X
DS30561C-page 26  1997-2013 Microchip Technology Inc.
FIGURE 5-1: BLOCK DIAGRAM OF GP0/AN0 AND GP1/AN1/VREF PIN
Data Bus
P
N
WR PORT
WR TRIS
RD TRIS
V
DD
Data Latch
DQ
CK
Q
TRIS Latch
VDD
P
VDD
DQ
EN
RD PORT
To A/D Converter
Analog
Input
Mode
TTL
Input
Buffer
I/O Pin
GPPU
VSS
DQ
CK
Q
VSS
GP0/INT
(1)
and GP1/INT
(1)
Note 1: Wake-up on pin change interrupts for GP0 and GP1.