Datasheet

PIC12C67X
DS30561C-page 100 1997-2013 Microchip Technology Inc.
12.6 Timing Diagrams and Specifications
FIGURE 12-5: EXTERNAL CLOCK TIMING
TABLE 12-1: CLOCK TIMING REQUIREMENTS
Parameter
No.
Sym Characteristic Min Typ† Max Units Conditions
F
OSC External CLKIN Frequency
(Note 1)
DC 4 MHz XT and EXTRC osc mode
DC 4 MHz HS osc mode (PIC12CE67X-04)
DC 10 MHz HS osc mode (PIC12CE67X-10)
DC 200 kHz LP osc mode
Oscillator Frequency
(Note 1)
DC 4 MHz EXTRC osc mode
.455 4 MHz XT osc mode
4 4 MHz HS osc mode (PIC12CE67X-04)
4 10 MHz HS osc mode (PIC12CE67X-10)
5 200 kHz LP osc mode
1T
OSC External CLKIN Period
(Note 1)
250 ns XT and EXTRC osc mode
250 ns HS osc mode (PIC12CE67X-04)
100 ns HS osc mode (PIC12CE67X-10)
5— s LP osc mode
Oscillator Period
(Note 1)
250 ns EXTRC osc mode
250 10,000 ns XT osc mode
250 250 ns HS osc mode (PIC12CE67X-04)
100 250 ns HS osc mode (PIC12CE67X-10)
5— sLP osc mode
2T
CY Instruction Cycle Time (Note 1) 400 DC ns TCY = 4/FOSC
3 TosL,
Tos H
External Clock in (OSC1) High
or Low Time
50 — ns XT oscillator
2.5 s LP oscillator
10 ns HS oscillator
4TosR,
Tos F
External Clock in (OSC1) Rise
or Fall Time
— — 25 ns XT oscillator
— — 50 ns LP oscillator
15 ns HS oscillator
Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and
are not tested.
Note 1: Instruction cycle period (T
CY) equals four times the input oscillator time-base period. All specified values are based
on characterization data for that particular oscillator type under standard operating conditions with the device exe-
cuting code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than
expected current consumption. All devices are tested to operate at "min." values with an external clock applied to
the OSC1/CLKIN pin.
When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices. OSC2 is discon-
nected (has no loading) for the PIC12C67X.
OSC1
CLKOUT
Q4 Q1 Q2 Q3 Q4 Q1
1
2
3
3
4
4