Datasheet

 1999 Microchip Technology Inc. DS40139E-page 41
PIC12C5XX
FIGURE 8-8: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
FIGURE 8-9: TIME-OUT SEQUENCE ON POWER-UP (MCLR
PULLED LOW)
FIGURE 8-10: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIED TO VDD): FAST VDD RISE TIME
SQ
R
Q
VDD
GP3/MCLR/VPP
Power-Up
Detect
On-Chip
DRT OSC
POR (Power-On Reset)
WDT Time-out
RESET
CHIP RESET
8-bit Asynch
Ripple Counter
(Start-Up Timer)
MCLRE
SLEEP
Pin Change
Wake-up on
pin change
VDD
MCLR
INTERNAL POR
DRT TIME-OUT
INTERNAL RESET
TDRT
VDD
MCLR
INTERNAL POR
DRT TIME-OUT
INTERNAL RESET
TDRT