Datasheet
1999 Microchip Technology Inc. DS40139E-page 51
PIC12C5XX
CALL Subroutine Call
Syntax: [
label
] CALL k
Operands: 0 ≤ k ≤ 255
Operation: (PC) + 1→ Top of Stack;
k → PC<7:0>;
(STATUS<6:5>) → PC<10:9>;
0 → PC<8>
Status Affected: None
Encoding:
1001 kkkk kkkk
Description:
Subroutine call. First, return address
(PC+1) is pushed onto the stack. The
eight bit immediate address is loaded
into PC bits <7:0>. The upper bits
PC<10:9> are loaded from STA-
TUS<6:5>, PC<8> is cleared. CALL is
a two cycle instruction.
Words: 1
Cycles: 2
Example:
HERE CALL THERE
Before Instruction
PC = address (HERE)
After Instruction
PC = address (THERE)
TOS = address (HERE + 1)
CLRF Clear f
Syntax: [
label
] CLRF f
Operands: 0 ≤ f ≤ 31
Operation: 00h → (f);
1 → Z
Status Affected: Z
Encoding:
0000 011f ffff
Description:
The contents of register ’f’ are cleared
and the Z bit is set.
Words: 1
Cycles: 1
Example:
CLRF FLAG_REG
Before Instruction
FLAG_REG = 0x5A
After Instruction
FLAG_REG = 0x00
Z=1
CLRW Clear W
Syntax: [
label
] CLRW
Operands: None
Operation: 00h → (W);
1 → Z
Status Affected: Z
Encoding:
0000 0100 0000
Description:
The W register is cleared. Zero bit (Z)
is set.
Words: 1
Cycles: 1
Example:
CLRW
Before Instruction
W = 0x5A
After Instruction
W = 0x00
Z=1
CLRWDT Clear Watchdog Timer
Syntax: [
label
] CLRWDT
Operands: None
Operation: 00h → WDT;
0 → WDT prescaler (if assigned);
1 → TO;
1 → PD
Status Affected: TO, PD
Encoding:
0000 0000 0100
Description:
The CLRWDT instruction resets the
WDT. It also resets the prescaler, if the
prescaler is assigned to the WDT and
not Timer0. Status bits TO
and PD are
set.
Words: 1
Cycles: 1
Example:
CLRWDT
Before Instruction
WDT counter = ?
After Instruction
WDT counter = 0x00
WDT prescale = 0
TO
=1
PD
=1