Datasheet
PIC12C5XX
DS40139E-page 72 1999 Microchip Technology Inc.
TABLE 11-4: TIMING REQUIREMENTS - PIC12C508/C509
FIGURE 11-4: RESET, WATCHDOG TIMER, AND DEVICE RESET TIMER TIMING - PIC12C508/C509
AC Characteristics Standard Operating Conditions (unless otherwise specified)
Operating Temperature 0°C ≤ T
A ≤ +70°C (commercial)
–40°C ≤ T
A ≤ +85°C (industrial)
–40°C ≤ T
A ≤ +125°C (extended)
Operating Voltage V
DD range is described in Section 11.1
Parameter
No. Sym Characteristic Min Typ
(1)
Max Units
17
To sH 2i oV
OSC1↑ (Q1 cycle) to Port out valid
(3)
— — 100* ns
18
To sH 2i oI O S C1 ↑ (Q2 cycle) to Port input invalid
(I/O in hold time)
TBD — — ns
19
TioV2osH Port input valid to OSC1↑
(I/O in setup time)
TBD — — ns
20
TioR
Port output rise time
(2, 3)
—1025**ns
21
TioF
Port output fall time
(2, 3)
—1025**ns
* These parameters are characterized but not tested.
** These parameters are design targets and are not tested. No characterization data available at this time.
Note 1: Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated. These parameters are for design
guidance only and are not tested.
2: Measurements are taken in EXTRC mode.
3: See Figure 11-1 for loading conditions.
VDD
MCLR
Internal
POR
DRT
Timeout
Internal
RESET
Watchdog
Timer
RESET
32
31
34
I/O pin
32
32
34
(Note 1)
Note 1: I/O pins must be taken out of hi-impedance mode by enabling the output drivers in software.
30
(Note 2)
2: Runs in MCLR or WDT reset only in XT and LP modes.