Datasheet
PIC12C5XX
DS40139E-page 28 1999 Microchip Technology Inc.
6.2 Prescaler
An 8-bit counter is available as a prescaler for the
Timer0 module, or as a postscaler for the Watchdog
Timer (WDT), respectively (Section 8.6). For simplicity,
this counter is being referred to as “prescaler”
throughout this data sheet. Note that the prescaler
may be used by either the Timer0 module or the WDT,
but not both. Thus, a prescaler assignment for the
Timer0 module means that there is no prescaler for
the WDT, and vice-versa.
The PSA and PS2:PS0 bits (OPTION<3:0>)
determine prescaler assignment and prescale ratio.
When assigned to the Timer0 module, all instructions
writing to the TMR0 register (e.g., CLRF 1,
MOVWF 1, BSF 1,x, etc.) will clear the prescaler.
When assigned to WDT, a CLRWDT instruction will
clear the prescaler along with the WDT. The prescaler
is neither readable nor writable. On a RESET, the
prescaler contains all '0's.
6.2.1 SWITCHING PRESCALER ASSIGNMENT
The prescaler assignment is fully under software control
(i.e., it can be changed “on the fly” during program
execution). To avoid an unintended device RESET, the
following instruction sequence (Example 6-1) must be
executed when changing the prescaler assignment from
Timer0 to the WDT.
EXAMPLE 6-1: CHANGING PRESCALER
(TIMER0→WDT)
1.CLRWDT ;Clear WDT
2.CLRF TMR0 ;Clear TMR0 & Prescaler
3.MOVLW '00xx1111’b ;These 3 lines (5, 6, 7)
4.OPTION ; are required only if
; desired
5.CLRWDT ;PS<2:0> are 000 or 001
6.MOVLW '00xx1xxx’b ;Set Postscaler to
7.OPTION ; desired WDT rate
To change prescaler from the WDT to the Timer0
module, use the sequence shown in Example 6-2. This
sequence must be used even if the WDT is disabled. A
CLRWDT instruction should be executed before
switching the prescaler.
EXAMPLE 6-2: CHANGING PRESCALER
(WDT→TIMER0)
CLRWDT ;Clear WDT and
;prescaler
MOVLW 'xxxx0xxx' ;Select TMR0, new
;prescale value and
;clock source
OPTION
FIGURE 6-5: BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
TCY ( = Fosc/4)
Sync
2
Cycles
TMR0 reg
8-bit Prescaler
8 - to - 1MUX
M
MUX
Watchdog
Timer
PSA
0
1
0
1
WDT
Time-Out
PS2:PS0
8
Note: T0CS, T0SE, PSA, PS2:PS0 are bits in the OPTION register.
PSA
WDT Enable bit
0
1
0
1
Data Bus
8
PSA
T0CS
M
U
X
M
U
X
U
X
T0SE
GP2/T0CKI
Pin