Datasheet
PIC10(L)F320/322
DS41585A-page 92 Preliminary 2011 Microchip Technology Inc.
15.1 ADC Configuration
When configuring and using the ADC the following
functions must be considered:
• Port configuration
• Channel selection
• ADC conversion clock source
• Interrupt control
15.1.1 PORT CONFIGURATION
The ADC can be used to convert both analog and
digital signals. When converting analog signals, the I/O
pin should be configured for analog by setting the
associated TRIS and ANSEL bits. Refer to
Section 10.0 “I/O Port” for more information.
15.1.2 CHANNEL SELECTION
There are up to 5 channel selections available:
• AN<2:0> pins
• Temperature Indicator
• FVR (Fixed Voltage Reference) Output
Refer to Section 12.0 “Fixed Voltage Reference
(FVR)” and Section 14.0 “Temperature Indicator
Module” for more information on these channel selec-
tions.
The CHS bits of the ADCON register determine which
channel is connected to the sample and hold circuit.
When changing channels, a delay is required before
starting the next conversion. Refer to Section 15.2
“ADC Operation” for more information.
15.1.3 ADC VOLTAGE REFERENCE
There is no external voltage reference connections to
the ADC. Only V
DD can be used as a reference source.
The FVR is only available as an input channel and not
a V
REF+ input to the ADC.
15.1.4 CONVERSION CLOCK
The source of the conversion clock is software select-
able via the ADCS bits of the ADCON register
(Register 15-1). There are seven possible clock
options:
•F
OSC/2
•F
OSC/4
•FOSC/8
•FOSC/16
•F
OSC/32
•FOSC/64
•FRC (dedicated internal oscillator)
The time to complete one bit conversion is defined as
T
AD. One full 8-bit conversion requires 9.5 TAD periods
as shown in Figure 15-2.
For correct conversion, the appropriate T
AD specifica-
tion must be met. Refer to the A/D conversion require-
ments in Section 24.0 “Electrical Specifications” for
more information. Table 15-1 gives examples of appro-
priate ADC clock selections.
Note: Analog voltages on any pin that is defined
as a digital input may cause the input buf-
fer to conduct excess current.
Note 1: Any changes in the system clock fre-
quency will change the ADC clock fre-
quency, which may adversely affect the
ADC result.