Datasheet

 2011 Microchip Technology Inc. Preliminary DS41585A-page 29
PIC10(L)F320/322
4.3.3 REFERENCE CLOCK OUTPUT
CONTROL
FOSC/4 output is enabled via the CLKROE bit of
CLKRCON register. The signal drives the pin
regardless of the TRIS setting.
REGISTER 4-1: CLKRCON – REFERENCE CLOCK CONTROL REGISTER
U-0 R/W-0/0 U-0 U-0 U-0 U-0 U-0 U-0
—CLKROE— — — — — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
q = Value depends on condition
bit 7 Unimplemented: Read as ‘0’
bit 6 CLKROE: Reference Clock Output Enable bit
1 = Reference Clock output (CLKR), regardless of TRIS
0 = Reference Clock output disabled
bit 5-0 Unimplemented: Read as ‘0’