Datasheet

PIC10(L)F320/322
DS41585A-page 24 Preliminary  2011 Microchip Technology Inc.
3.2 Code Protection
Code protection allows the device to be protected from
unauthorized access. Program memory protection and
data memory protection are controlled independently.
Internal access to the program memory and data
memory are unaffected by any code protection setting.
3.2.1 PROGRAM MEMORY PROTECTION
The entire program memory space is protected from
external reads and writes by the CP
bit in Configuration
Word. When CP
= 0, external reads and writes of
program memory are inhibited and a read will return all
‘0’s. The CPU can continue to read program memory,
regardless of the protection bit settings. Writing the
program memory is dependent upon the write
protection setting. See Section 3.3 “Write
Protection” for more information.
3.3 Write Protection
Write protection allows the device to be protected from
unintended self-writes. Applications, such as boot
loader software, can be protected while allowing other
regions of the program memory to be modified.
The WRT<1:0> bits in Configuration Word define the
size of the program memory block that is protected.
3.4 User ID
Four memory locations (2000h-2003h) are designated
as ID locations where the user can store checksum or
other code identification numbers. These locations are
readable and writable during normal execution. See
Section 3.5 “Device ID and Revision ID” for more
information on accessing these memory locations.
For
more information on checksum calculation, see the
“PIC10(L)F320/322 Flash Memory Programming
Specification” (DS41572).