Datasheet

PIC10(L)F320/322
DS41585A-page 16 Preliminary  2011 Microchip Technology Inc.
2.2.3 DEVICE MEMORY MAPS
The memory maps for PIC10(L)F320/322 are as shown
in Table 2-2.
TABLE 2-2: PIC10(L)F320/322 MEMORY MAP (BANK 0)
Legend: = Unimplemented data memory locations, read as ‘0’.
* = Not a physical register.
INDF
(*)
00h
PMADRL
20h
General
Purpose
Registers
32 Bytes
40h
5Fh
General
Purpose
Registers
32 Bytes
60h
7Fh
TMR0 01h PMADRH 21h
PCL 02h PMDATL 22h
STATUS 03h PMDATH 23h
FSR 04h PMCON1 24h
PORTA 05h PMCON2 25h
TRISA 06h CLKRCON 26h
LATA 07h NCO1ACCL 27h
ANSELA
08h
NCO1ACCH
28h
WPUA
09h
NCO1ACCU
29h
PCLATH 0Ah NCO1INCL 2Ah
INTCON 0Bh NCO1INCH 2Bh
PIR1 0Ch Reserved 2Ch
PIE1 0Dh NCO1CON 2Dh
OPTION_REG 0Eh NCO1CLK 2Eh
PCON 0Fh Reserved 2Fh
OSCCON 10h WDTCON 30h
TMR2 11h CLC1CON 31h
PR2 12h CLC1SEL1 32h
T2CON 13h CLC1SEL2 33h
PWM1DCL 14h CLC1POL 34h
PWM1DC 15h CLC1GATE1 35h
PWM1CON 16h CLC1GATE2 36h
PWM2DCL 17h CLC1GATE3 37h
PWM2DC 18h CLC1GATE4 38h
PWM2CON 19h CWG1CON0 39h
IOCAP 1Ah CWG1CON1 3Ah
IOCAN 1Bh CWG1ASD 3Bh
IOCAF 1Ch CWG1RC 3Ch
FVRCON 1Dh CWG1FC 3Dh
ADRES
1Eh
VREGCON
3Eh
ADCON 1Fh
BORCON
3Fh