Datasheet

PIC10(L)F320/322
DS41585A-page 106 Preliminary  2011 Microchip Technology Inc.
REGISTER 17-1: T2CON: TIMER2 CONTROL REGISTER
U-0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0
— TOUTPS<3:0> TMR2ON T2CKPS<1:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7 Unimplemented: Read as ‘0’
bit 6-3 TOUTPS<3:0>: Timer2 Output Postscaler Select bits
1111 = 1:16 Postscaler
1110 = 1:15 Postscaler
1101 = 1:14 Postscaler
1100 = 1:13 Postscaler
1011 = 1:12 Postscaler
1010 = 1:11 Postscaler
1001 = 1:10 Postscaler
1000 =1:9 Postscaler
0111 =1:8 Postscaler
0110 =1:7 Postscaler
0101 =1:6 Postscaler
0100 =1:5 Postscaler
0011 =1:4 Postscaler
0010 =1:3 Postscaler
0001 =1:2 Postscaler
0000 =1:1 Postscaler
bit 2 TMR2ON: Timer2 On bit
1 = Timer2 is on
0 = Timer2 is off
bit 1-0 T2CKPS<1:0>: Timer2 Clock Prescale Select bits
1x = Prescaler is 64
01 = Prescaler is 4
00 = Prescaler is 1
TABLE 17-1: SUMMARY OF REGISTERS ASSOCIATED WITH TIMER2
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register on
Page
INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 46
PIE1
— ADIE — NCO1IE CLC1IE —TMR2IE — 47
PIR1
— ADIF — NCO1IF CLC1IF —TMR2IF — 48
PR2 Timer2 module Period Register 105
TMR2 Timer2 module Register 105
T2CON
— TOUTPS<3:0> TMR2ON T2CKPS<1:0> 106
Legend: x = unknown, u = unchanged, - = unimplemented read as ‘0’. Shaded cells are not used for Timer2 module.