Datasheet

© 2007 Microchip Technology Inc. DS41270E-page 9
PIC10F220/222
3.0 ARCHITECTURAL OVERVIEW
The high performance of the PIC10F220/222 devices
can be attributed to a number of architectural features
commonly found in RISC microprocessors. To begin
with, the PIC10F220/222 devices use a Harvard archi-
tecture in which program and data are accessed on
separate buses. This improves bandwidth over tradi-
tional von Neumann architectures where program and
data are fetched on the same bus. Separating program
and data memory further allows instructions to be sized
differently than the 8-bit wide data word. Instruction
opcodes are 12 bits wide, making it possible to have all
single-word instructions. A 12-bit wide program mem-
ory access bus fetches a 12-bit instruction in a single
cycle. A two-stage pipeline overlaps fetch and execu-
tion of instructions. Consequently, all instructions (33)
execute in a single cycle (1 μs @ 4 MHz or 500 ns @
8 MHz) except for program branches.
The table below lists program memory (Flash) and data
memory (RAM) for the PIC10F220/222 devices.
The PIC10F220/222 devices can directly or indirectly
address its register files and data memory. All Special
Function Registers (SFR), including the PC, are
mapped in the data memory. The PIC10F220/222
devices have a highly orthogonal (symmetrical) instruc-
tion set that makes it possible to carry out any opera-
tion, on any register, using any addressing mode. This
symmetrical nature and lack of “special optimal situa-
tions” make programming with the PIC10F220/222
devices simple, yet efficient. In addition, the learning
curve is reduced significantly.
The PIC10F220/222 devices contain an 8-bit ALU and
working register. The ALU is a general purpose arith-
metic unit. It performs arithmetic and Boolean functions
between data in the working register and any register
file.
The ALU is 8-bits wide and capable of addition, sub-
traction, shift and logical operations. Unless otherwise
mentioned, arithmetic operations are two’s comple-
ment in nature. In two-operand instructions, one oper-
and is typically the W (working) register. The other
operand is either a file register or an immediate
constant. In single operand instructions, the operand is
either the W register or a file register.
The W register is an 8-bit working register used for ALU
operations. It is not an addressable register.
Depending on the instruction executed, the ALU may
affect the values of the Carry (C), Digit Carry (DC) and
Zero (Z) bits in the STATUS register. The C and DC bits
operate as a borrow
and digit borrow out bit, respec-
tively, in subtraction. See the SUBWF and ADDWF
instructions for examples.
A simplified block diagram is shown in Figure 3-1 with
the corresponding device pins described in Table 3-1.
Device
Memory
Program Data
PIC10F220 256 x 12 16 x 8
PIC10F222 512 x 12 23 x 8