Datasheet

2004 Microchip Technology Inc. Preliminary DS41239A-page 17
PIC10F200/202/204/206
FIGURE 4-3: PIC10F200/204 REGISTER
FILE MAP
FIGURE 4-4: PIC10F202/206 REGISTER
FILE MAP
File Address
00h
01h
02h
03h
04h
05h
06h
07h
10h
INDF
(1)
TMR0
PCL
STATUS
FSR
OSCCAL
GPIO
General
Purpose
Registers
Note 1: Not a physical register. See Section 4.9
“Indirect Data Addressing: INDF and
FSR Registers”.
2: PIC10F204 only. Unimplemented on the
PIC10F200 and reads as 00h.
3: Unimplemented, read as 00h.
08h
CMCON0
(2)
0Fh
1Fh
Unimplemented
(3)
File Address
00h
01h
02h
03h
04h
05h
06h
07h
18h
INDF
(1)
TMR0
PCL
STATUS
FSR
OSCCAL
GPIO
General
Purpose
Registers
Note 1: Not a physical register. See Section 4.9
“Indirect Data Addressing: INDF and
FSR Registers”.
2: PIC10F206 only. Unimplemented on the
PIC10F202 and reads as 00h.
08h
CMCON0
(2)