Datasheet

PIC10F200/202/204/206
DS41239D-page 44 © 2007 Microchip Technology Inc.
FIGURE 9-2: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
FIGURE 9-3: TIME-OUT SEQUENCE ON POWER-UP (MCLR PULLED LOW)
FIGURE 9-4: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIED TO VDD): FAST VDD RISE
TIME
SQ
R
Q
VDD
GP3/MCLR/VPP
Power-up
Detect
POR (Power-on Reset)
WDT Reset
CHIP Reset
MCLRE
Wake-up on pin change Reset
Start-up Timer
(10 μs or 18 ms)
WDT Time-out
Pin Change
Sleep
MCLR
Reset
VDD
MCLR
Internal POR
DRT Time-out
Internal Reset
TDRT
VDD
MCLR
Internal POR
DRT Time-out
Internal Reset
TDRT