Datasheet

 2012 Microchip Technology Inc. DS41663A-page 5
MTCH6301 PROJECTED CAPACITIVE TOUCH CONTROLLER
TABLE 3-1: PINOUT I/O DESCRIPTIONS
Pin Name Pin Number Pin Type Description
RESET 18 I/P Reset device (active low)
SCL 44 I Synchronous serial clock input/output for I
2
C™
SDA 1 I/O Synchronous serial data input/output for I
2
C
INT 8 O Interrupt (from MTCH6301 to master) for I
2
C
RX0 27 I/O
RX Sense (or TX Drive)
RX1 26 I/O
RX2 25 I/O
RX3 24 I/O
RX4 23 I/O
RX5 22 I/O
RX6 21 I/O
RX7 20 I/O
RX8 19 I/O
RX9 15 I/O
RX10 14 I/O
RX11 11 I/O
RX12 10 I/O
TX0 33 O
TX Drive
TX1 32 O
TX2 31 O
TX3 30 O
TX4 34 O
TX5 38 O
TX6 37 O
TX7 36 O
TX8 35 O
TX9 41 O
TX10 42 O
TX11 43 O
TX12 13 O
TX13 12 O
TX14 5 O
TX15 4 O
TX16 3 O
TX17 2 O
N/C 9 N/C No Connect
V
CAP 7 P CPU logic filter capacitor connection
VDD 17, 28, 40 P Positive supply for peripheral logic and I/O pins
V
SS 6, 16, 29, 39 P Ground reference for logic and I/O pins. This pin must be
connected at all times