Datasheet

2012 Microchip Technology Inc. DS41663A-page 23
MTCH6301 PROJECTED CAPACITIVE TOUCH CONTROLLER
FIGURE 8-2: I
2
C™ BUS DATA TIMING CHARACTERISTICS
TABLE 8-6: I
2
C™ BUS DATA TIMING REQUIREMENTS
Parameter
Number
Symbol Characteristic Min. Max. Units Conditions
IS1 TLO:SCL Clock Low Time 100 kHz Mode 4.7 µs
400 kHz Mode 1.3 µs
IS2 THI:SCL Clock High Time 100 kHz Mode 4.0 µs
400 kHz Mode .6 µs
IS3 TF:SCL SDA and SCL
Fall Time
100 kHz Mode 300 ns
400 kHz Mode 20+0.1 CB 300 ns
IS4 TR:SCL SDA and SCL
Rise Time
100 kHz Mode 1000 ns
400 kHz Mode 20+0.1 CB 300 ns
IS5 TSU:DAT Data Input Setup
Time
100 kHz Mode 250 ns
400 kHz Mode 100 ns
IS6 THD:DAT Data Input Hold
Time
100 kHz Mode 0 ns
400 kHz Mode 0 0.9 µs
IS7 THD:STA Start Condition
Setup Time
100 kHz Mode 4700 ns Only relevant for repeated
start condition
400 kHz Mode 600 ns
IS8 THD:STA Start Condition
Hold Time
100 kHz Mode 4000 ns After this period, the first
clock pulse is generated
400 kHz Mode 600 ns
IS9 TSU:STO Stop Condition
Setup Time
100 kHz Mode 4000 ns
400 kHz Mode 600 ns
IS10 THD:STO Stop Condition
Hold Time
100 kHz Mode 4000 ns
400 kHz Mode 600 ns
IS11 TAA:SCL Output Valid
from Clock
100 kHz Mode 0 3500 ns
400 kHz Mode 0 1000 ns
IS12 TDF:SDA Bus Free Time 100 kHz Mode 4.7 µs Time bus must be free
before new transmission can
start
400 kHz Mode 1.3 µs
CB SCL, SDC Capacitive Loading 400 pF Parameter is characterized,
but not tested