Datasheet

MTCH6301 PROJECTED CAPACITIVE TOUCH CONTROLLER
DS41663A-page 14  2012 Microchip Technology Inc.
5.7 I
2
C Specification
The MTCH6301 device supports the I
2
C serial proto-
col, with the addition of an interrupt pin for notifying the
master that data is ready. The device operates in Slave
mode, meaning that the device does not generate the
serial clock.
5.7.1 SERIAL DATA (SDA)
The Serial Data (SDA) signal is the data signal of the
device. The value on this pin is latched on the rising
edge of the SCL signal when the signal is an input. With
the exception of the START (RESTART) and STOP
conditions, the high or low state of the SDA pin can only
change when the clock signal on the SCL pin is low.
During the high period of the clock, the SDA pin’s value
(high or low) must be stable. Changes in the SDA pin’s
value while the SCL pin is HIGH will be interpreted as
a START or a STOP condition.
5.7.2 SERIAL CLOCK (SCL)
The Serial Clock (SCL) signal is the clock signal of the
device. The rising edge of the SCL signal latches the
value on the SDA pin. The MTCH6301 employs clock
stretching, and this should be taken into account by the
master controller. The maximum speed at which the
MTCH6301 can operate is 400 kbps.
5.7.3 INTERRUPT (INT)
This pin is utilized by the MTCH6301 to signal that data
is available, and that the master controller should
invoke a MASTER READ. INT is an active high pin, and
is held low during all other activities.
5.7.4 DEVICE ADDRESSING
The MTCH6301 7-bit base address is set to 0x25, and
is not configurable by the user. Every transmission
must be prefixed with this address, as well as a bit sig-
nifying whether the transmission is a MASTER WRITE
(‘0’) or MASTER READ (‘1’). After appending this
read/write bit to the base address, this first byte
becomes either 0x4A (WRITE) or 0x4B (READ).
FIGURE 5-6: SINGLE TRANSMISSION I
2
C™ FORMAT
5.7.5 TYPICAL I
2
C™ COMMAND READ
AND WRITE
Figure 5-7 depicts the master controller reading from
RAM location 0x01 (number of RX channels), and the
device responding accordingly with 0x0C (Figure 5-6).
Note: If the device is not read within 25 ms of
asserting the INT pin, it will time out and
data will no longer be available.
SDA
SCL
StartA6A5A4A3A2A1A0R/WACK D7 D6 D5 D4 D3 D2 D1 D0 ACK Stop
Address & R/W Byte Data Byte(s)
1 = Read
0 = Write
1 = Acknowledge
0 = Not Acknowledged