Datasheet

5Atmel LED Driver-MSL3162
Timing, PWM, Intensity Controls and Synchronization
The internal PWM dimming is synchronized to the LCD's frame timing through the PHI input (typically VSYNC) and the
GSC input (typically HSYNC) to eliminate beating artifacts and maintain high timing accuracy. Suitability for LED backlight
architectures is shown in Table 2. LED area dimming for direct backlighting is supported for contrast improvement. Motion
blur is reduced by setting each LED string's PWM phasing individually to synchronize PWM off times with the LCD refresh
timing for the zone being lit.
BACKLIGHT TYPE
STRING SUPPLY
OPTIONS
MOTION BLUR REMOVAL
LED ZONE
MANAGEMENT
White LED – Bottom, edge-lit
Up to three efciency
optimized supplies
No No
White LED – Top/bottom,
edge-lit
No No
White LED – Four sides,
edge-lit
No No
White LED – Direct, back-lit Yes - LED strip phasing
Higher contrast ratio (area
dimming)
RGB LED – Direct, back-lit
R, G, B efciency optimized
supplies
Yes - LED strip phasing
Higher contrast ratio and color
gamut
Table 2. Atmel LED Driver-MSL3162 LED Common Backlight Drive Architectures
Atmel LED Driver-MSL3162
16-string, RGB and White LED Drivers with Adaptive
Power Control and 1MHz I
2
C/SMBus Serial Interface