Datasheet
6 Atmel LED Driver-MSL3082
PIN # NAME DESCRIPTION
1 SCL
I²C serial clock Input
SCL is the I²C serial interface clock input.
2 SDA
I²C serial data I/O
SDA is the I²C serial interface data I/O.
3, 44
AD1,
AD0
I²C slave ID selection inputs
AD0 and AD1 select the device I²C slave address.
4 FLTB
Fault output (open drain, active low)
FLTB sinks current to GND when the MSL3082 detects a fault.
FLTB remains low until the fault registers have been read or EN is toggled low.
5 FBI
Efciency Optimizer input
Connect FBI to FBO of the next device when chaining the Efciency Optimizers.
If unused connect FBI to GND close to the device.
6 FBO
Efciency Optimizer output
Connect FBO through a Schottky diode to the string power supply’s feedback node (Figure 4),
or to FBI of the previous device (Figure 5).
If unused leave FBO unconnected.
7, 43 GND
Power ground
Connect GND to system ground, to CGND and to EP with short, wide traces.
8, 11, 14, 17,
20, 23, 26, 29
S0 - S7
String 0 thru 7 source sense inputs
Connect S
n
to the source of external MOSFET
n
, and to the current sense resistor for LED string
n
.
The full-scale LED current is reached when 500mV is across the current sense resistor.
9, 12, 15, 18,
21, 24, 27, 30
G0 - G7
String 0 thru 7 external MOSFET gate drive outputs
Connect G
n
to the gate of the external MOSFET
n
.
10, 13, 16, 19,
22, 25, 28, 31
D0 - D7
String 0 thru 7 external MOSFET drain sense inputs
Connect D
n
to the drain of external MOSFET
n
through a 10MΩ resistor.
32 VIN
Supply voltage input
Connect a 12V ±10% supply to VIN. Bypass VIN to GND with a 1µF ceramic capacitor placed close to VIN.
33 VDD
Internal 2.5V regulator capacitor connection
Bypass VDD to GND with a 10µF ceramic capacitor placed close to the device.
34 EN
Enable input (active high)
Drive EN high to turn on the MSL3082, drive EN low to turn off the MSL3082.
For automatic start-up, connect EN to VIN through a 100kΩ resistor.
35, 39 NC
No connection
Make no connection to NC.
36, 37, 38 CGND
Connect to ground
Connect CGND to system ground, to GND and to EP using short, wide traces.
40 PHI
Phase synchronization input
Drive PHI with an external signal from 40Hz to 10kHz to synchronize the PWM dimming to the signal at PHI.
Connect PHI to GND if unused.
41 GSC
Gate shift clock input
Drive GSC with the gate shift clock of the video signal up to 5MHz. GSC sets the resolution of PWM dimming.
Connect GSC to GND if unused.
42 PWM
PWM input
Drive PWM with a pulse-width-modulated signal with a duty cycle of 0% to 100% and frequency of 20Hz
to 50kHz to control the brightness of all LED strings.
Exposed Pad EP
Power ground
Connect EP to system ground, GND and CGND using short, wide traces. EP offers thermal relief to the die.
Pin Descriptions