Datasheet

22
Atmel MSL3080 Datasheet
8 String 60mA LED Driver with Integrated Boost Controller
Next determine the desired crossover frequency as 1/5th of the lower of the ESR zero f
ESRZ
, the right-half-plane zero f
RHPZ
or the
switching frequency f
SW
. The crossover frequency equation is:
where f
C
is the crossover frequency, R
TOP
is the top side voltage divider resistor (from the output voltage to FB), R
COMP
is the resistor of
the series RC compensation network. Rearranging the factors of this equation yields the solution for R
COMP
as:
These equations are accurate if the compensation zero (formed by the compensation resistor R
COMP
and the compensation capacitor
C
COMP
) happens at a lower frequency than crossover. Therefore the next step is to choose the compensation capacitor such that the
compensation zero is 1/5th of the crossover frequency, or:
Solving for C
COMP
:
Example:
As an example, set the maximum (un-optimized) output voltage to 39V, using voltage divider as follows:
R
TOP
= 49.9k
R
BOTTOM
= 3.40k
Let the load current be 800mA maximum, use 10uH inductor, a 20µF output capacitor, a 12V input voltage, a 12mΩ R
CS
, and the
switching frequency is 625kHz.
Set the crossover frequency to 1/5th f
RHPZ
:
Next calculate the compensation resistor value to achieve the 15kHz crossover frequency, or
Then calculate the compensation capacitor, C
COMP
, to set the compensation zero to 1/5th of the crossover frequency, or 3kHz
When laying out the circuit board, place the voltage divider resistors and compensation resistor/capacitors as close to the MSL3040/41
as possible and minimize trace lengths connected to COMP and FB.
Place the MOSFET and rectifier close together and as close to the output capacitor(s) as possible to reduce circuit board
radiated emissions.
LOOP COMPENSATION
Use a series RC network from COMP to FB to compensate the MSL3040/41 regulation loop (Figure 3 on page 12). The
regulation loop dynamics are sensitive to output capacitor and inductor values. To begin, determine the right-half-plane
zero frequency:
L
R
V
V
f
LOAD
OUT
IN
RHPZ
2
2
,
where R
LOAD
is the minimum equivalent load resistor, or
)( MAXOUT
OUT
LOAD
I
V
R
.
The output capacitance and type of capacitor affect the regulation loop and method of compensation. In the case of
ceramic capacitors the zero caused by the equivalent series resistance (ESR) is at such a high frequency that it is not of
consequence. In the case of electrolytic or tantalum capacitors the ESR is significant, so must be considered when
compensating the regulation loop. Determine the ESR zero frequency by the equation:
OUT
ESRZ
CESR
f

2
1
where C
OUT
is the value of the output capacitor, and ESR is the Equivalent Series Resistance of the output capacitor.
Assure that the loop crossover frequency is at least 1/5
th
of the ESR zero frequency.
Next determine the desired crossover frequency as 1/5
th
of the lower of the ESR zero f
ESRZ
, the right-half-plane zero f
RHPZ
or the switching frequency f
SW
. The crossover frequency equation is:

OUTLOADCS
LOAD
TOP
COMP
C
CRR
R
R
R
f
2
1
11
,
where f
C
is the crossover frequency, R
TOP
is the top side voltage divider resistor (from the output voltage to FB), R
COMP
is
the resistor of the series RC compensation network. Rearranging the factors of this equation yields the solution for R
COMP
as:
OUTCCSTOPCOMP
C f RR R 
21 1 .
These equations are accurate if the compensation zero (formed by the compensation resistor R
COMP
and the
compensation capacitor C
COMP
) happens at a lower frequency than crossover. Therefore the next step is to choose the
compensation capacitor such that the compensation zero is 1/5
th
of the crossover frequency, or:
COMPCOMP
C
COMPZ
CR
f
f
2
1
5
.
Solving for C
COMP
:
CCOMP
COMP
fR
C
2
5
.
Page 20 of 22
© Atmel Inc., 2011. All rights reserved.
Place the MOSFET and rectifier close together and as close to the output capacitor(s) as possible to reduce circuit board
radiated emissions.
LOOP COMPENSATION
Use a series RC network from COMP to FB to compensate the MSL3040/41 regulation loop (Figure 3 on page 12). The
regulation loop dynamics are sensitive to output capacitor and inductor values. To begin, determine the right-half-plane
zero frequency:
L
R
V
V
f
LOAD
OUT
IN
RHPZ
2
2
,
where R
LOAD
is the minimum equivalent load resistor, or
)( MAXOUT
OUT
LOAD
I
V
R
.
The output capacitance and type of capacitor affect the regulation loop and method of compensation. In the case of
ceramic capacitors the zero caused by the equivalent series resistance (ESR) is at such a high frequency that it is not of
consequence. In the case of electrolytic or tantalum capacitors the ESR is significant, so must be considered when
compensating the regulation loop. Determine the ESR zero frequency by the equation:
OUT
ESRZ
CESR
f

2
1
where C
OUT
is the value of the output capacitor, and ESR is the Equivalent Series Resistance of the output capacitor.
Assure that the loop crossover frequency is at least 1/5
th
of the ESR zero frequency.
Next determine the desired crossover frequency as 1/5
th
of the lower of the ESR zero f
ESRZ
, the right-half-plane zero f
RHPZ
or the switching frequency f
SW
. The crossover frequency equation is:

OUTLOADCS
LOAD
TOP
COMP
C
CRR
R
R
R
f
2
1
11
,
where f
C
is the crossover frequency, R
TOP
is the top side voltage divider resistor (from the output voltage to FB), R
COMP
is
the resistor of the series RC compensation network. Rearranging the factors of this equation yields the solution for R
COMP
as:
OUTCCSTOPCOMP
C f RR R 
21 1
.
These equations are accurate if the compensation zero (formed by the compensation resistor R
COMP
and the
compensation capacitor C
COMP
) happens at a lower frequency than crossover. Therefore the next step is to choose the
compensation capacitor such that the compensation zero is 1/5
th
of the crossover frequency, or:
COMPCOMP
C
COMPZ
CR
f
f
2
1
5
.
Solving for C
COMP
:
CCOMP
COMP
fR
C
2
5
.
Page 20 of 22
© Atmel Inc., 2011. All rights reserved.
Place the MOSFET and rectifier close together and as close to the output capacitor(s) as possible to reduce circuit board
radiated emissions.
LOOP COMPENSATION
Use a series RC network from COMP to FB to compensate the MSL3040/41 regulation loop (Figure 3 on page 12). The
regulation loop dynamics are sensitive to output capacitor and inductor values. To begin, determine the right-half-plane
zero frequency:
L
R
V
V
f
LOAD
OUT
IN
RHPZ
2
2
,
where R
LOAD
is the minimum equivalent load resistor, or
)( MAXOUT
OUT
LOAD
I
V
R
.
The output capacitance and type of capacitor affect the regulation loop and method of compensation. In the case of
ceramic capacitors the zero caused by the equivalent series resistance (ESR) is at such a high frequency that it is not of
consequence. In the case of electrolytic or tantalum capacitors the ESR is significant, so must be considered when
compensating the regulation loop. Determine the ESR zero frequency by the equation:
OUT
ESRZ
CESR
f

2
1
where C
OUT
is the value of the output capacitor, and ESR is the Equivalent Series Resistance of the output capacitor.
Assure that the loop crossover frequency is at least 1/5
th
of the ESR zero frequency.
Next determine the desired crossover frequency as 1/5
th
of the lower of the ESR zero f
ESRZ
, the right-half-plane zero f
RHPZ
or the switching frequency f
SW
. The crossover frequency equation is:

OUTLOADCS
LOAD
TOP
COMP
C
CRR
R
R
R
f
2
1
11
,
where f
C
is the crossover frequency, R
TOP
is the top side voltage divider resistor (from the output voltage to FB), R
COMP
is
the resistor of the series RC compensation network. Rearranging the factors of this equation yields the solution for R
COMP
as:
OUTCCSTOPCOMP
C f RR R 
21 1 .
These equations are accurate if the compensation zero (formed by the compensation resistor R
COMP
and the
compensation capacitor C
COMP
) happens at a lower frequency than crossover. Therefore the next step is to choose the
compensation capacitor such that the compensation zero is 1/5
th
of the crossover frequency, or:
COMPCOMP
C
COMPZ
CR
f
f
2
1
5
.
Solving for C
COMP
:
CCOMP
COMP
fR
C
2
5
.
Page 20 of 22
© Atmel Inc., 2011. All rights reserved.
Place the MOSFET and rectifier close together and as close to the output capacitor(s) as possible to reduce circuit board
radiated emissions.
LOOP COMPENSATION
Use a series RC network from COMP to FB to compensate the MSL3040/41 regulation loop (Figure 3 on page 12). The
regulation loop dynamics are sensitive to output capacitor and inductor values. To begin, determine the right-half-plane
zero frequency:
L
R
V
V
f
LOAD
OUT
IN
RHPZ
2
2
,
where R
LOAD
is the minimum equivalent load resistor, or
)( MAXOUT
OUT
LOAD
I
V
R
.
The output capacitance and type of capacitor affect the regulation loop and method of compensation. In the case of
ceramic capacitors the zero caused by the equivalent series resistance (ESR) is at such a high frequency that it is not of
consequence. In the case of electrolytic or tantalum capacitors the ESR is significant, so must be considered when
compensating the regulation loop. Determine the ESR zero frequency by the equation:
OUT
ESRZ
CESR
f

2
1
where C
OUT
is the value of the output capacitor, and ESR is the Equivalent Series Resistance of the output capacitor.
Assure that the loop crossover frequency is at least 1/5
th
of the ESR zero frequency.
Next determine the desired crossover frequency as 1/5
th
of the lower of the ESR zero f
ESRZ
, the right-half-plane zero f
RHPZ
or the switching frequency f
SW
. The crossover frequency equation is:

OUTLOADCS
LOAD
TOP
COMP
C
CRR
R
R
R
f
2
1
11
,
where f
C
is the crossover frequency, R
TOP
is the top side voltage divider resistor (from the output voltage to FB), R
COMP
is
the resistor of the series RC compensation network. Rearranging the factors of this equation yields the solution for R
COMP
as:
OUTCCSTOPCOMP
C f RR R 
21 1 .
These equations are accurate if the compensation zero (formed by the compensation resistor R
COMP
and the
compensation capacitor C
COMP
) happens at a lower frequency than crossover. Therefore the next step is to choose the
compensation capacitor such that the compensation zero is 1/5
th
of the crossover frequency, or:
COMPCOMP
C
COMPZ
CR
f
f
2
1
5
.
Solving for C
COMP
:
CCOMP
COMP
fR
C
2
5
.
Page 20 of 22
© Atmel Inc., 2011. All rights reserved.
Example:
As an example, set the maximum (un-optimized) output voltage to 39V, using voltage divider as follows:
R
TOP
= 49.9k
R
BOTTOM
= 3.40k
Let the load current be 800mA maximum, use 10uH inductor, a 20F output capacitor, a 12V input voltage, a 12m R
CS
,
and the switching frequency is 625kHz.
 75.48
8.0
39
A
V
I
V
R
LOAD
OUT
LOAD

kHz
L
R
V
V
f
LOAD
OUT
IN
RHPZ
73
10102
75.48
39
12
2
6
2
2

Set the crossover frequency to 1/5
th
f
RHPZ
:
kHz
f
f
RHPZ
C
6 .1 4
5

.
Next calculate the compensation resistor value to achieve the 15kHz crossover frequency, or
 kF kkC f RR R
OUTCCSTOPCOMP
9.2520152025.119.4921 1
Then calculate the compensation capacitor, C
COMP
, to set the compensation zero to 1/5
th
of the crossover frequency, or
3kHz
nF
kkfR
C
COMPZCOMP
COMP
1.2
3 2 52
1
2
1


.
When laying out the circuit board, place the voltage divider resistors and compensation resistor/capacitors as close to the
MSL3040/41 as possible and minimize trace lengths connected to COMP and FB.
LED Dimming Control
E
XTERNAL AND I
2
C CONTROL OF LED BRIGHTNESS
Control MSL3040 LED brightness using Pulse Width Modulation (PWM) with a PWM signal applied to the external PWM
input. The PWM dimming signals (outputs) take the frequency and duty cycle of the input signal but are staggered in time
so that they start at evenly spaced intervals relative to the PWM input signal. When one or more strings are disabled by
fault response, the stagger delays automatically re-calculate for the remaining enabled strings.
The MSL3041 accepts two input signals, SYNC and PWM. SYNC provides the frequency information for the PWM
dimming, and PWM provides the duty cycle information. The LED PWM dimming signals are staggered based on the
frequency at SYNC.
For all drivers, use PWM and SYNC inputs frequency between 20Hz and 50kHz and duty cycle between 0% and 100%
(avoid duty cycles above 99.97% and less than 100%).
Additionally, internal registers accessed using the I
2
C compatible serial interface allow control of the PWM dimming
frequency and duty cycle. For programming details see the MSL3040/41/50/60/80/86/87/88 Programming Guide.
Page 21 of 22
© Atmel Inc., 2011. All rights reserved.
Example:
As an example, set the maximum (un-optimized) output voltage to 39V, using voltage divider as follows:
R
TOP
= 49.9k
R
BOTTOM
= 3.40k
Let the load current be 800mA maximum, use 10uH inductor, a 20F output capacitor, a 12V input voltage, a 12m R
CS
,
and the switching frequency is 625kHz.
 75.48
8.0
39
A
V
I
V
R
LOAD
OUT
LOAD

kHz
L
R
V
V
f
LOAD
OUT
IN
RHPZ
73
10102
75.48
39
12
2
6
2
2

Set the crossover frequency to 1/5
th
f
RHPZ
:
kHz
f
f
RHPZ
C
6 .1 4
5

.
Next calculate the compensation resistor value to achieve the 15kHz crossover frequency, or
 kF kkC f RR R
OUTCCSTOPCOMP
9.2520152025.119.4921 1
Then calculate the compensation capacitor, C
COMP
, to set the compensation zero to 1/5
th
of the crossover frequency, or
3kHz
nF
kkfR
C
COMPZCOMP
COMP
1.2
3 2 52
1
2
1


.
When laying out the circuit board, place the voltage divider resistors and compensation resistor/capacitors as close to the
MSL3040/41 as possible and minimize trace lengths connected to COMP and FB.
LED Dimming Control
E
XTERNAL AND I
2
C CONTROL OF LED BRIGHTNESS
Control MSL3040 LED brightness using Pulse Width Modulation (PWM) with a PWM signal applied to the external PWM
input. The PWM dimming signals (outputs) take the frequency and duty cycle of the input signal but are staggered in time
so that they start at evenly spaced intervals relative to the PWM input signal. When one or more strings are disabled by
fault response, the stagger delays automatically re-calculate for the remaining enabled strings.
The MSL3041 accepts two input signals, SYNC and PWM. SYNC provides the frequency information for the PWM
dimming, and PWM provides the duty cycle information. The LED PWM dimming signals are staggered based on the
frequency at SYNC.
For all drivers, use PWM and SYNC inputs frequency between 20Hz and 50kHz and duty cycle between 0% and 100%
(avoid duty cycles above 99.97% and less than 100%).
Additionally, internal registers accessed using the I
2
C compatible serial interface allow control of the PWM dimming
frequency and duty cycle. For programming details see the MSL3040/41/50/60/80/86/87/88 Programming Guide.
Page 21 of 22
© Atmel Inc., 2011. All rights reserved.
Example:
As an example, set the maximum (un-optimized) output voltage to 39V, using voltage divider as follows:
R
TOP
= 49.9k
R
BOTTOM
= 3.40k
Let the load current be 800mA maximum, use 10uH inductor, a 20F output capacitor, a 12V input voltage, a 12m R
CS
,
and the switching frequency is 625kHz.
 75.48
8.0
39
A
V
I
V
R
LOAD
OUT
LOAD

kHz
L
R
V
V
f
LOAD
OUT
IN
RHPZ
73
10102
75.48
39
12
2
6
2
2

Set the crossover frequency to 1/5
th
f
RHPZ
:
kHz
f
f
RHPZ
C
6 .1 4
5

.
Next calculate the compensation resistor value to achieve the 15kHz crossover frequency, or

kF kk
C f RR R
OUTCCSTOPCOMP
9.2520152025.119.49
21 1
Then calculate the compensation capacitor, C
COMP
, to set the compensation zero to 1/5
th
of the crossover frequency, or
3kHz
nF
kkfR
C
COMPZCOMP
COMP
1.2
3 2 52
1
2
1


.
When laying out the circuit board, place the voltage divider resistors and compensation resistor/capacitors as close to the
MSL3040/41 as possible and minimize trace lengths connected to COMP and FB.
LED Dimming Control
E
XTERNAL AND I
2
C CONTROL OF LED BRIGHTNESS
Control MSL3040 LED brightness using Pulse Width Modulation (PWM) with a PWM signal applied to the external PWM
input. The PWM dimming signals (outputs) take the frequency and duty cycle of the input signal but are staggered in time
so that they start at evenly spaced intervals relative to the PWM input signal. When one or more strings are disabled by
fault response, the stagger delays automatically re-calculate for the remaining enabled strings.
The MSL3041 accepts two input signals, SYNC and PWM. SYNC provides the frequency information for the PWM
dimming, and PWM provides the duty cycle information. The LED PWM dimming signals are staggered based on the
frequency at SYNC.
For all drivers, use PWM and SYNC inputs frequency between 20Hz and 50kHz and duty cycle between 0% and 100%
(avoid duty cycles above 99.97% and less than 100%).
Additionally, internal registers accessed using the I
2
C compatible serial interface allow control of the PWM dimming
frequency and duty cycle. For programming details see the MSL3040/41/50/60/80/86/87/88 Programming Guide.
Page 21 of 22
© Atmel Inc., 2011. All rights reserved.
Example:
As an example, set the maximum (un-optimized) output voltage to 39V, using voltage divider as follows:
R
TOP
= 49.9k
R
BOTTOM
= 3.40k
Let the load current be 800mA maximum, use 10uH inductor, a 20F output capacitor, a 12V input voltage, a 12m R
CS
,
and the switching frequency is 625kHz.
 75.48
8.0
39
A
V
I
V
R
LOAD
OUT
LOAD

kHz
L
R
V
V
f
LOAD
OUT
IN
RHPZ
73
10102
75.48
39
12
2
6
2
2

Set the crossover frequency to 1/5
th
f
RHPZ
:
kHz
f
f
RHPZ
C
6 .1 4
5

.
Next calculate the compensation resistor value to achieve the 15kHz crossover frequency, or
 kF kkC f RR R
OUTCCSTOPCOMP
9.2520152025.119.4921 1
Then calculate the compensation capacitor, C
COMP
, to set the compensation zero to 1/5
th
of the crossover frequency, or
3kHz
nF
kkfR
C
COMPZCOMP
COMP
1.2
3 2 52
1
2
1


.
When laying out the circuit board, place the voltage divider resistors and compensation resistor/capacitors as close to the
MSL3040/41 as possible and minimize trace lengths connected to COMP and FB.
LED Dimming Control
E
XTERNAL AND I
2
C CONTROL OF LED BRIGHTNESS
Control MSL3040 LED brightness using Pulse Width Modulation (PWM) with a PWM signal applied to the external PWM
input. The PWM dimming signals (outputs) take the frequency and duty cycle of the input signal but are staggered in time
so that they start at evenly spaced intervals relative to the PWM input signal. When one or more strings are disabled by
fault response, the stagger delays automatically re-calculate for the remaining enabled strings.
The MSL3041 accepts two input signals, SYNC and PWM. SYNC provides the frequency information for the PWM
dimming, and PWM provides the duty cycle information. The LED PWM dimming signals are staggered based on the
frequency at SYNC.
For all drivers, use PWM and SYNC inputs frequency between 20Hz and 50kHz and duty cycle between 0% and 100%
(avoid duty cycles above 99.97% and less than 100%).
Additionally, internal registers accessed using the I
2
C compatible serial interface allow control of the PWM dimming
frequency and duty cycle. For programming details see the MSL3040/41/50/60/80/86/87/88 Programming Guide.
Page 21 of 22
© Atmel Inc., 2011. All rights reserved.
=
x
=
x
x
=
x