Datasheet
Table Of Contents
- Features
- Typical Applications
- 1. Introduction
- 2. Ordering Information
- 3. Application Circuit
- 4. Absolute Maximum Ratings
- 5. Electrical Characteristics
- 6. Block Diagram
- 7. Pinout and Pin Description
- 8. Typical Application Circuit
- 9. Detailed Description
- 10. Fault Conditions
- 11. Applications Information
- 12. Control Registers
- 13. Detailed Register Descriptions
- 13.1 RAM (0x00 through 0x1F)
- 13.2 Main String Reference Voltage register (MREF, 0x20)
- 13.3 Color-Adjust String Reference Voltage register (CAREF, 0x21)
- 13.4 Fault Disable register (FAULT, 0x22)
- 13.5 Fault Status register (FAULTSTAT, 0x23), Read Only
- 13.6 Sleep register (SLEEP, 0x24)
- 13.7 Main String Duty Cycle register, High Byte (MDUTYHIGH, 0x34)
- 13.8 Main String Duty Cycle register, Low Byte (MDUTYLOW, 0x35)
- 13.9 Color Adjust String Duty Cycle register, High Byte (CADUTYHIGH, 0x36)
- 13.10 Color Adjust String Duty Cycle register, Low Byte (CADUTYLOW, 0x37)
- 13.11 Efficiency Optimizer Control Register (EOCTRL, 0x40)
- 13.12 Registers 0x60 and 0x61, EEPROM Access
- 14. I²C Serial Interface
- 15. Packaging Information
- 16. Datasheet Revision History
- Table of Contents
12
MSL2023/2024 [DATASHEET]
42063A–LED–02/2013
6. Block Diagram
Figure 6-1. MSL2023 block diagram.
REGULATORS
AVIN
REXT
1.2V
CURRENT
GENERATOR
G
S
DAC
EFFICIENCY OPTIMIZER
FBO
DRV
C
OFF
S
R
Q
QB
VREF
CS
CONTROL LOGIC
EN
FAULT
DETECT
FLTB
TOFF
CURRENT
GENERATOR
OSCILLATOR
D
VCC
VDD
PVIN
MUX
DAC
START
CLOCK
VREF
MAIN DUTY CYCLE
REGISTER
400HZ PWM
GENERATOR
VREF
PGND
AGND
MSL2023
COLOR ADJUST DUTY
CYCLE REGISTER
SERIAL
INTERFACE
SCL SDA