Atmel LED Drivers MSL2023 / MSL2024 2-String LED Driver with Individual PWM Dimming and Adaptive Headroom Control for High CRI LED Luminaires Features Dual-string LED driver for 2-color or 2 unequal VF LEDs Phase shifted register controlled dimming (MSL2023) Individual PWM inputs (MSL2024) Adaptively controls headroom of AC/DC or DC/DC, isolated or non-isolated topologies Main LED string driven by linear current controller Drives external N-channel MOSFET ± 3% current accuracy, no ripple current
1. Introduction The MSL2023/24 LED drivers for two-color systems include a linear current controller for the main string, typically for white LEDs, and a second floating buck controller for a color-adjust LED string. Both the switching and linear controllers drive external MOSFETs to provide flexibility over a wide range of power levels (LED currents and voltages). The MSL2023/24 adaptively manage the voltage powering the main LED string.
4. Absolute Maximum Ratings Voltage with respect to AGND AVIN, PVIN, EN VCC, PWM1, PWM2, FLTB, SDA, SCL, TOFF, REXT, FBO VDD CS, S D G, DRV PGND -0.3V to +16.5V -0.3V to +5.5V -0.3V to +2.75V -0.3V to VDD+0.3V -0.3V to +22V -0.3V to VIN+0.3V -0.3V to +0.
5. Electrical Characteristics AVIN = PVIN = 12V, -40°C ≤TA ≤ 105°C, Typical Operating Circuit, unless otherwise noted. Typical values at TA = +25°C. Parameter Symbol Conditions Min. Typ. Max. Unit 9.
Parameter Symbol Conditions FBO Full Scale Current Min. Typ. Max. Unit 170 255 340 A FBO LSB Current Thermal Shutdown Temperature Temperature rising Thermal Shutdown Hysteresis 1.0 A 133 °C 15 °C 0.5 s AC Electrical Characteristics DRV tOFF timing RTOFF = 45.3k PWM Input Frequency PWM1(8) 60 22,000 Hz PWM2(8) 100 500 Hz 1 100 % PWM Duty Cycle PWM1, PWM2 PWM Duty Cycle Resolution MSL2023 0.024 % I²C Switching Characteristics (1) SCL Clock Frequency 0.
Typical Operating Characteristics Figure 5-1. START-UP behavior, PWM = 10% duty cycle. VLED FBO Iin Imain Figure 5-2. START-UP behavior, PWM = 90% duty cycle.
Figure 5-3. MSL2023 operation, PWM = 10% duty cycle. Imain Ica Figure 5-4. MSL2023 operation, PWM = 90% duty cycle.
Figure 5-5. MSL2024 operation, PWM = 10% duty cycle. PWM1in Imain PWM2in Ica Figure 5-6. MSL2024 operation, PWM = 90% duty cycle.
Figure 5-7. Fault response, string open circuit. PWMin FLTB Imain Ica Figure 5-8. Fault response, LED short circuit.
Figure 5-9. Input current vs. input voltage. 10 5 9 4.5 8 7 6 3.5 5 3 ISLEEP f IN = 400Hz PWM = 50% 2.5 4 2 3 1.5 2 1 ISHDN 1 IIN (µA) IIN (mA) 4 IIN 0.5 0 0 10 11 12 13 14 15 VIN (V) Figure 5-10. Average LED current vs. input PWM duty cycle.
Figure 5-11. VCC and VDD regulation. 5.5 5.0 4.5 VCC VOUT (V) 4.0 3.5 3.0 2.5 VDD 2.0 1.5 1.0 f IN = 400Hz PWM = 50% 0.5 0.
6. Block Diagram Figure 6-1. MSL2023 block diagram. AVIN VDD VCC SCL SDA SERIAL INTERFACE REGULATORS D EFFICIENCY OPTIMIZER VREF FBO DAC VREF EN G MSL2023 CONTROL LOGIC S START CLOCK FLTB FAULT DETECT OSCILLATOR MUX MAIN DUTY CYCLE REGISTER 400HZ PWM GENERATOR COLOR ADJUST DUTY CYCLE REGISTER PVIN DRV TOFF CURRENT GENERATOR CURRENT GENERATOR S Q R QB CS VREF COFF 1.
Figure 6-2. MSL2024 block diagram. AVIN VDD VCC SCL SDA SERIAL INTERFACE REGULATORS D EFFICIENCY OPTIMIZER VREF FBO DAC VREF EN G MSL2024 CONTROL LOGIC S START CLOCK FLTB FAULT DETECT OSCILLATOR MUX PWM1 PVIN PWM2 DRV TOFF CURRENT GENERATOR CURRENT GENERATOR S Q R QB CS VREF COFF 1.
AVIN D G VDD AGND VCC AVIN D G Pinout – MSL2023 and MSL2024 VCC 7.1 AGND Pinout and Pin Description VDD 7. 24 23 22 21 20 19 24 23 22 21 20 19 3 MSL2023 16 PVIN PWM1 3 MSL2024 16 PVIN SCL 4 (TOP VIEW) 15 DRV SCL 4 (TOP VIEW) 15 DRV SDA 5 14 PGND SDA 5 14 PGND FLTB 6 13 CS FLTB 6 13 CS 7 8 9 10 11 12 7 8 9 10 11 12 CGND CGND DNC 17 NC TOFF 2 REXT EN PWM2 17 NC NC 2 CGND 18 S DNC 1 TOFF EN 7.
Pin Name MSL2023 MSL2024 NC 7, 17 7, 17 PWM2 – 8 REXT 9 9 Description No internal connection PWM2 Dimming Input Drive PWM2 with a pulse-width modulated signal to control LED brightness of the color-adjust string. See “PWM and LED Brightness” on page 24 for details. External Resistor Connect a 46.4k, 1% resistor from REXT to AGND.
Pin Name MSL2023 MSL2024 AGND 23 23 VDD 24 24 EP EP EP 8. Description Analog Ground Connect AGND to system ground. 2.5V Internal Voltage Connect 10µF bypass capacitor from VDD to AGND. Exposed Pad Connect EP to a large copper plane connected to PGND and AGND. Typical Application Circuit MSL2023/24 controlling the output of an isolated PFC controller; a linear current sink regulates the white LED current and a floating buck converter regulates the color LED string current. Figure 8-1.
Figure 8-2. MSL2024 typical application circuit. VAC AC-DC ISOLATED With PFC COLOR LEDS WHITE LEDS EN 12V - FBO D IRFR110 G S 1μF + RD 100kΩ PVIN 1μF AVIN 46.4kΩ 10μF REXT TOFF VCC VDD MSL2024 LED DRIVER 330μH 1.5Ω MBR0560 FDD3860 DRV CS PGND 2.7Ω SDA SCL 45.
9. Detailed Description Table 9-1. Device selection guide, LED brightness control by part number. LED brightness control Part Main string Color adjust string PWM dimming frequency MSL2023 Main PWM register(1) Color adjust PWM register(1) 400Hz MSL2024 Duty cycle at the PWM1 input Duty cycle at the PWM2 input Input frequency main: 60Hz to 22kHz (minimum tON = 2µs) CA: 100Hz to 500Hz Note: 1. Access registers through I2C serial interface.
Table 10-1. Fault conditions, response and recovery. Fault Response Recovery action Die Temperature > 147°C Asleep (I2C still active) When die temperature falls below 127°C operation resumes Color-Adjust String has Shorted LEDs Color-Adjust string turns off, FLTB pulls low, and bit 0 of the Fault Status register 0x23 sets high Correct the short condition in LED string.
V OUT MIN V fMIN N + 0.2V where VfMIN is the minimum LED forward voltage for the main string LEDs at the expected LED current, N is the number of LEDs in the string, and 0.2V is the minimum overhead required for the current sense resistor and the FET. Then determine the maximum output voltage using: V OUT MAX = V fMAX N + 1.2V where VfMAX is the maximum LED forward voltage for the main string LEDs at the operating LED current, N is the number of LEDs in the string, and 1.
11.6 Selecting the Color-Adjust String Floating Buck Components Figure 11-1. Floating buck LED driver. VLED WHITE LEDS (MAIN STRING) COLOR LEDS (COLOR-ADJUST STRING) Ci + IAVE VBUCK - Co Lo D1 MSL2023/24 LED Driver Q TOFF DRV CS RCS RTOFF PGND The MSL2023/24 includes a driver for a constant off-time floating buck topology, shown in Figure 11-1, to convert the main string voltage to a value appropriate for the color-adjust LED string. The buck is operated in continuous conduction mode.
Figure 11-2. Color-adjust string LED on-current details. I INDUCTOR CURRENT IPEAK ? iL IAVE LED CURRENT (WHEN USING CO) tOFF t The color-adjust string LED on-current regulates by monitoring the voltage at CS, the color-adjust string FET source resistor connection. The reference voltage VCSFB for CS is 200mV (VCSFB is 200mV by default, and is adjustable through the serial interface; see the register definitions for details about changing VCSFB).
This topology does not require an output capacitor, Co in Figure 11-1 on page 21. When used, Co steers the inductor’s ripple current away from the LEDs but reduces the accuracy of PWM dimming because the voltage across it cannot change quickly. When using Co, a ceramic capacitor of between 1.0µF and 10µF is adequate, with a voltage rating higher than VBUCK. The output capacitor of the AC/DC converter that produces the main string voltage, Ci in Figure 11-1 on page 21, doubles as the buck’s input capacitor.
11.7 PWM and LED Brightness Figure 6-1 on page 12 is a block diagram that shows how the MSL2023 controls the brightness of the LEDs. The duty cycle of each string equals the value programmed into the 12-bit PWM control registers MainDuty[11:0] and ColorAdjustDuty[11:0], (registers 0x34 through 0x37). The frequency of the PWM dimming is 400Hz. The dimming signals for the two strings are 180º out of phase.
2. 12.1 Unless changed through the EEPROM, these default values load at power-up, and when EN is taken from low to high. EEPROM and Power-Up Defaults An on-chip EEPROM holds all the default register values (Table 12-1 on page 24). At power-up the data in the EEPROM automatically copy directly to control registers 0x00 thru 0x51, setting up the device for operation.
Table 12-2. EEPROM Address register (E2ADDR, 0x60), defaults highlighted. Register data Register Address D7 E2ADDR 0x60 D6 D5 D4 D3 – D2 D1 D0 E2ADDR[6:0] DEFAULTS 0 0 0 0 0 0 0 0 EEPROM Minimum Address 0x00 – 0 0 0 0 0 0 0 EEPROM Maximum Address 0x51 – 1 0 1 0 0 0 1 D2 D1 D0 Table 12-3. EEPROM Control register (E2CTRL, 0x61), defaults highlighted.
13.2 Main String Reference Voltage register (MREF, 0x20) Holds the DAC value that controls the reference voltage for the main string FET source feedback voltage. The reference voltage equals decimal value of this register times 2mV. The default value for MSREF is 0x64, which equates to MREF = 200mV. Table 13-2. Main String Reference register (MREF, 0x20), defaults highlighted. Register data Register name Address D7 MREF 13.
Table 13-4. Fault Disable register (FAULT, 0x22), defaults highlighted. Register data Register name Address D7 D6 D5 D4 D3 D2 D1 D0 – – – – – TSDMASK OCDIS SCDIS DEFAULT = 0x00 0 0 0 0 0 0 0 0 Act on faults x x x x x 0 0 0 Disable LED Short Circuit Fault x x x x x 0 0 1 Disable String Open Circuit Fault x x x x x 0 1 x Do Not Allow Thermal Shutdown Fault to Pull FLTB Low x x x x x 1 x x FAULT 13.
13.7 Main String Duty Cycle register, High Byte (MDUTYHIGH, 0x34) Contains the upper 8-bits of the 12-bit MSL2023 main string duty cycle setting. The remaining 4-bits are in register 0x35. The registers combine to form the main string duty cycle, a linear relation where 0x000 = 0% to 0xFFF = 100%. When changed, the duty cycle updates at the beginning of the next output PWM period. Table 13-7. Main String Duty Cycle High register (MDUTYHIGH, 0x34), defaults highlighted.
Table 13-10. Color Adjust String Duty Cycle Low register (CADUTYLOW, 0x37), default highlighted. Register name CADUTYLOW Address / Default 0x37 DEFAULTS = 0x0F Register data D7 D6 D5 D4 – – – – 0 0 0 0 D3 D2 D1 D0 CADUTYLOW[3:0] 1 1 1 1 13.11 Efficiency Optimizer Control Register (EOCTRL, 0x40) Configures three functions associated with the Adaptive SourcePower™ Efficiency Optimizer (EO).
Figure 14-1. I2C interface connections. VI2C 2 x 2.2kΩ TYPICAL 100kΩ MASTER SDA SCL INT (μC) SDA SCL FLTB MSL2023 MSL2024 A transmission consists of a START condition sent by a master, a 7-bit slave address plus one R/W bit, an acknowledge bit, none or many data bytes each separated by an acknowledge bit, and a STOP condition (Figure 14-2, Figure 14-4 and Figure 14-5 on page 32). Figure 14-2. I2C serial interface timing details.
14.3 I2C START and STOP Conditions Both SCL and SDA remain high when the interface is free. The master signals a transmission with a START condition (S) by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP condition (P) by transitioning SDA from low to high while SCL is high. The bus is then free. Figure 14-4. I2C START and STOP conditions. SDA S P START CONDITION STOP CONDITION SCL 14.
Figure 14-6. I2C slave address. SDA A7 = 0 A6 = 1 A5 = 0 A4 = 0 A3 =0 A2 = 0 A1 = 0 R/W A 2 3 4 5 6 7 8 9 MSB SCL 14.6 1 I2C Message Format for Writing to the MSL2023/24 A write to the MSL2023/24 contains the MSL2023/24’s slave address, the R/W bit cleared to 0, and at least 1 byte of information (Figure 14-7 on page 33). The first byte of information is the register address byte.
acknowledges. The pointer auto-increments during each master initiated acknowledge period. End the transmission with a not-acknowledge followed by a stop condition. Figure 14-9. I2C reading register data with preset register pointer. ACKNOWLEDGE FROM MSL202x START SDA 0 1 0 0 0 0 0 1 A ACKNOWLEDGE FROM MASTER . D7 SLAVE ADDRESS, READ ACCESS . . . . . D0 A NOT ACKNOWLEDGE FROM MASTER . D7 READ REGISTER ADDRESS X . . . . .
Figure 14-11. I2C broadcast writing a data byte. ACKNOWLEDGE FROM MSL202x START SDA 0 0 0 0 0 0 0 0 A BROADCAST WRITE SLAVE ADDRESS 0 1 ACKNOWLEDGE FROM MSL202x 0 0 0 0 1 0 A D7 . ACKNOWLEDGE FROM MSL202x . . . . . D0 A D7 SETS ALL REGISTER POINTERS TO X MSL202x BROADCAST ID . ACKNOWLEDGE FROM MSL202x . . . . .
15. Packaging Information No representation or warranties are made concerning third-party patents with regard to the use of Atmel® products. The mixing of red LEDs with phosphor-converted LEDs may be protected by certain third-party patents, such as U.S. Patent No. 7,213,940 and related patents of Cree, Inc.
16. Datasheet Revision History 16.1 42063A – 02/2013 1. Initial revision.
Table of Contents Features 1 Typical Applications 1 1. Introduction 2 2. Ordering Information 2 3. Application Circuit 2 4. Absolute Maximum Ratings 3 5. Electrical Characteristics 4 6. Block Diagram 12 7. Pinout and Pin Description 14 7.1 7.2 Pinout – MSL2023 and MSL2024 14 Pin Descriptions 14 8. Typical Application Circuit 16 9. Detailed Description 18 10. Fault Conditions 18 11. Applications Information 19 11.1 11.2 11.3 11.4 11.5 11.6 11.
14. I²C Serial Interface 30 14.1 14.2 14.3 14.4 14.5 14.6 14.7 14.8 I2C Bus Timeout 31 I2C Bit Transfer 31 I2C START and STOP Conditions 32 I2C Acknowledge Bit 32 I2C Slave Address 32 I2C Message Format for Writing to the MSL2023/24 33 I2C Message Format for Reading from the MSL2023/24 33 I2C Message Format for Broadcast Writing to Multiple devices 34 15. Packaging Information 36 16. Datasheet Revision History 37 16.
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