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42062A–LED–02/2013

Features

 Dual-string LED driver for 2-color or unequal VF LEDs

 PWM dimming with 180° phase shift of LED strings

 Programmable look-up table for color temperature compensation

 Main LED string driven by linear current controller

 Drives external N-channel MOSFET

 ± 3% current accuracy, no ripple current

 Adaptively controls headroom of both AC/DC and DC/DC, isolated or non-isolated

topology

 Wide PWM dimming range with 12-bit precision

 8-bit DAC for peak current control

 Color-adjust LED string uses floating buck controller

 Drives external N-channel MOSFET

 Temperature color compensation using programmable look-up table

 Over 100:1 dimming range with 8-bit precision

 8-bit DAC allows changing current sense threshold

 Open and short LED protection

 Over-temperature fault detection

 Operates stand-alone or with a microcontroller

 Open-drain fault indicator output

 -40°C To +105°C operating temperature range

Typical Applications

 General and Architectural Lamps

 High CRI LED Fixtures

 Down Lights and Recessed Lights

 PAR Lamps

Atmel LED Drivers

MSL2021

2-String LED Driver with Built-In Color Temperature

Compensation and Adaptive Headroom Control for High

CRI LED Luminaires

Summary of content (41 pages)

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Atmel LED Drivers MSL2021 2-String LED Driver with Built-In Color Temperature Compensation and Adaptive Headroom Control for High CRI LED Luminaires Features  Dual-string LED driver for 2-color or unequal VF LEDs  PWM dimming with 180° phase shift of LED strings  Programmable look-up table for color temperature compensation  Main LED string driven by linear current controller Drives external N-channel MOSFET ± 3% current accuracy, no ripple current  Adaptively controls headroom of both AC/DC and DC/DC
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1. Introduction The MSL2021 LED driver for two-color systems includes a linear current controller for the main string, typically for white LEDs, and a second floating buck controller for a color-adjust LED string. Both the switching and linear controllers drive external MOSFETs to provide flexibility over a wide range of power levels (LED currents and voltages). The MSL2021 adaptively manages the voltage powering the main LED string.
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4. Absolute Maximum Ratings Voltage with respect to AGND AVIN, PVIN, EN VCC, PWM, FLTB, SDA, SCL, TOFF, REXT, FBO -0.3V to +16.5V -0.3V to +5.5V VDD -0.3V to +2.75V THM -0.3V to VCC+0.3V CS, S -0.3V to VDD+0.3V D G, DRV PGND, AGND -0.3V to +22V -0.3V to VIN+0.3V -0.3V to +0.
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5. Electrical Characteristics AVIN = PVIN = 12V, -40°C ≤TA ≤ 105°C, Typical Operating Circuit, unless otherwise noted. Typical values at TA = +25°C. Table 5-1. DC electrical characteristics Parameter Conditions AVIN, PVIN Operating Supply Voltage Min. Typ. Max. Unit 9.
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Parameter Conditions Min. Typ. Max. Unit FBO LSB Current 1.0 A THM Source Current 100 A THM Voltage Range Thermal Shutdown Temperature 0 Temperature rising Thermal Shutdown Hysteresis Table 5-2. V 133 °C 15 °C AC electrical characteristics Parameter Conditions DRV tOFF timing RTOFF = 45.3k PWM Input Frequency Min. (8) PWM Duty Cycle PWM Duty Cycle Resolution Table 5-3. 1.5 Typ. Max. Unit s 0.5 60 10,000 Hz 1 100 % MSL2021 0.
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5. 6. 7. 8. The maximum SDA and SCL rise times is 300ns. The maximum SDA fall time is 250ns. This allows series protection resistors to be connected between SDA and SCL inputs and the SDA/SCL bus lines without exceeding the maximum allowable rise time. Includes input filters on SDA and SCL that suppress noise less than 50ns. Additional decoupling may be required when pulling current from VCC and/or VDD in noisy environments. 2µs minimum on time for main LED string PWM dimming.
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Figure 5-3. Normal operation, PWM = 10% duty cycle (Test conditions). PWMin Imain Ica Figure 5-4. Normal operation, PWM = 90% duty cycle (Test conditions).
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Figure 5-5. Fault response, string open circuit (Test conditions). PWMin FLTB Imain Ica Figure 5-6. Fault response, LED short circuit (Test conditions).
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Figure 5-7. Input current vs. input voltage 100 IIN 10 ISLEEP IIN (mA) 1 f IN = 400Hz PWM = 50% 0.1 0.01 ISHDN 0.001 0.0001 10 11 12 13 VIN (V) 14 15 Figure 5-8. Average LED current vs.
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Figure 5-9. VCC and VDD regulation 5.5 5.0 4.5 VCC 4.0 VOUT (V) 3.5 3.0 2.5 VDD 2.0 1.5 1.0 f IN = 400Hz PWM = 50% 0.5 0.
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6. Block Diagram Figure 6-1. MSL2021 block diagram AVIN D VDD VCC EFFICIENCY OPTIMIZER REGULATORS VREF FBO DAC G VREF EN CONTROL LOGIC S START CLOCK FLTB FAULT DETECT PWM OSCILLATOR PWM DIGITIZER SDCR REGISTER LOOK-UP TABLE EEPROM THM ADC MUX 400HZ PWM GENERATOR AND DUTY CYCLE ENGINE PVIN DRV TOFF CURRENT GENERATOR CURRENT GENERATOR S Q R QB CS VREF COFF 1.
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7.2 AVIN D G Pinout MSL2021 VCC 7.1 AGND Pinout and Pin Description VDD 7. 24 23 22 21 20 19 17 NC PWM 3 MSL2021 16 PVIN SCL 4 (TOP VIEW) 15 DRV SDA 5 14 PGND FLTB 6 13 CS 7 8 9 10 11 12 CGND 2 DNC EN TOFF S REXT 18 THM 1 NC FBO Pin Descriptions Name Pin FBO 1 Feedback Output Feedback output from Efficiency Optimizer. Connect FBO to the LED power supply regulation feedback node to control VLED. When unused connect FBO to VCC.
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Name Pin NC 7, 17 Description No Internal Connection THM 8 NTC Thermistor Sensing Input Connect a negative temperature coefficient thermistor (ERT-J0EG103FA or equivalent) from THM to AGND, in series with a 1.5kΩ resistor. Locate the thermistor close to the Color-Adjust LEDs to monitor their temperature. This allows the MSL2021 to automatically temperature compensate the ColorAdjust string brightness. REXT 9 External Resistor Connect a 46.4k, 1% resistor from REXT to AGND.
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8. Typical Application Circuit MSL2021 controlling the output of an isolated PFC controller; a linear current sink regulates the white LED string current and a floating buck converter regulates the color LED string current. Figure 8-1. Typical application circuit VAC RTOP AC-DC ISOLATED With PFC RBOTTOM COLOR LEDS WHITE LEDS 100kΩ EN EN PWM FAULT Q1 1μF AVIN 10μF REXT TOFF VCC VDD AGND 45.3kΩ G S PVIN 46.4kΩ 1μF D PWM FLTB 1μF + 12V - FBO ERTJ0EG103FA MSL2021 LED DRIVER 820μH 0.
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10. Fault Conditions The MSL2021 detects fault conditions, and takes corrective action when faults are verified. String open circuit and LED short circuit conditions of the color-adjust string are monitored. When one of these faults occurs, FLTB pulls low to indicate a fault condition and the color-adjust LEDs turn off. Read Fault Status register 0x23 to determine the fault type. Clear these faults by toggling EN low then high. Faults that persist re-establish the fault response.
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V S  FB  =  0.002  MREF V where MREF is the decimal equivalent of the value in register 0x20. The default value for MREF is 0x64, for a feedback voltage of 0.2V. Change the feedback voltage by changing the value in register 0x20 using the serial interface. LED average current is within ±3% of the targeted value when a 1% resistor is used for RS. 11.
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11.6 Selecting the Color-Adjust String Floating Buck Components Figure 11-1. Floating buck LED driver VLED WHITE LEDS (MAIN STRING) COLOR LEDS (COLOR-ADJUST STRING) Ci + IAVE VBUCK - Co Lo D1 MSL2021 LED Driver Q TOFF DRV CS RCS RTOFF PGND The MSL2021 includes a driver for a constant off-time floating buck topology, shown in Figure 11-1, to convert the main string voltage to a value appropriate for the color-adjust LED string. The buck is operated in continuous conduction mode.
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Figure 11-2. Color-adjust string LED on-current details. I INDUCTOR CURRENT IPEAK ? iL IAVE LED CURRENT (WHEN USING CO) tOFF t The color-adjust string LED on-current regulates by monitoring the voltage at CS, the color-adjust string FET source resistor connection. The reference voltage VCSFB for CS is 200mV (VCSFB is 200mV by default, and is adjustable through the serial interface; see the register definitions for details about changing VCSFB).
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This topology does not require an output capacitor, Co in Figure 11-1 on page 17. When used, Co steers the inductor’s ripple current away from the LEDs but reduces the accuracy of PWM dimming because the voltage across it cannot change quickly. When using Co, a ceramic capacitor of between 1.0µF and 10µF is adequate, with a voltage rating higher than VBUCK. The output capacitor of the AC/DC converter that produces the main string voltage, Ci in Figure 11-1 on page 17, doubles as the buck’s input capacitor.
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11.7 PWM and LED Brightness The “Block Diagram” on page 11 shows how the MSL2021 controls the brightness of the LEDs. The duty cycle of the main string equals the duty cycle of the input signal at PWM. The PWM input accepts an input signal frequency of 60Hz to 10kHz, while the LED dimming frequency, of both the main and color-adjust strings, is 400Hz.
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The MSL2021 modifies the color-adjust string duty cycle using a look-up table. Default values are presented in Table 111; each location in the table corresponds to one temperature. The modification value is stored in the table as an 8-bit color-adjust duty cycle ratio (SDCR). The SDCR, a number from 0 to 255, is divided by 255, and multiplied by the duty cycle of the incoming PWM signal. The result is the duty cycle of the color-adjust string.
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Register Multiplication factor Temperature (°C) Note: 1. SDCRxx ---------------------255 Address Name Default Value 60 0x15 SDCR60 0x67 0.406 62 0x16 SDCR62 0x69 0.414 64 0x17 SDCR24 0x6B 0.422 66 0x18 SDCR66 0x6D 0.431 68 0x19 SDCR68 0x70 0.440 70 0x1A SDCR70 0x72 0.450 72 0x1B SDCR72 0x72 0.460 74 0x1C SDCR74 0x72 0.460 76 0x1D SDCR76 0x72 0.460 78 0x1E SDCR78 0x72 0.460 ≥80 0x1F SDCR70 0x72 0.
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11.9 MSL2021 Look-Up Table Lockout Procedure The MSL2021 features a lock for the look-up table. When locked, the table’s registers (0x00 through 0x1F) become readonly. A locked table cannot be unlocked; changing the table’s registers is no longer possible. Reads of a locked table’s registers return 0x00, unless the password (chosen when locking the table) is first entered to make the registers visible. Locking the table requires use of the I2C interface to enter data, read data and program the EEPROM.
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0x61 0x00 {disables EEPROM writing} The EEPROM is now programmed with the data that are in registers 0x00 through 0x1F (the look-up table). Although not required, now is a good time to cycle power to the MSL2021, then read registers 0x00 through 0x1F to verify that the EEPROM was properly programmed (at power-up the EEPROM automatically programs registers 0x00 through 0x40). Next, choose a 16-bit password and write it into the Password Registers, and into the Password Verification Registers.
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Reads of the Look-Up Table now return its true contents, until the password register is changed, power is cycled or enable input EN is toggled. 12. Control Registers Table 12-1.
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12.1 EEPROM and Power-Up Defaults An on-chip EEPROM holds all the default register values. At power-up the data in the EEPROM is transferred directly to control registers 0x00 thru 0x51, setting up the device for operation. Any changes made to registers 0x00 thru 0x69 after power-up are not reflected in the EEPROM and are lost when power is removed from the device, or when the enable input EN is forced low.
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Table 12-3. EEPROM Status Register (E2CTRL, 0x61), defaults highlighted. Register data Register Address D7 D6 D5 D4 D3 - - - - - DEFAULT 0 0 0 0 0 0 0 0 EEPROM Read / Write Disabled x x x x x 0 0 0 Read 1 Byte from EEPROM x x x x x 0 0 1 Read 8 Bytes from EEPROM x x x x x 0 1 0 Write 1 Byte to EEPROM x x x x x 0 1 1 Write 8 Bytes to EEPROM x x x x x 1 0 0 x x x x x 1 0 1 x x x x x 1 1 x E2CTRL 0x61 Unused 13.
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Table 13-2. Main String Reference register (MREF, 0x20), defaults highlighted Register data Register name Address D7 MREF 13.3 D6 D5 D4 0x20 D3 D2 D1 D0 MREF[7:0] DEFAULT: MREF = 100 * 2mV = 200mV 0 1 1 0 0 1 0 0 MREF = 0  2mV = 0V 0 0 0 0 0 0 0 0 MREF = 255 * 2mV = 510mV 1 1 1 1 1 1 1 1 Color-Adjust String Reference Voltage register (CAREF, 0x21) Holds the DAC value that controls the reference voltage for the color-adjust string FET source feedback voltage.
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13.5 Fault Status register (FAULTSTAT, 0x23), Read Only Reports the fault status for the color-adjust string. When a fault is reported in this register, the fault output FLTB pulls low. Toggle EN low, then high to clear the faults. Faults recur if the fault persists. Table 13-5.
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13.8 Password Verification registers (PWV(HIGH) and PWV(LOW), 0x38 and 0x39) Use these registers when locking the look-up table of the MSL2021. Also, enter the password (chosen when the Look-Up Table was locked) into these registers to allow reading the contents of a locked look-up table. See section “MSL2021 Look-Up Table Lockout Procedure” on page 23 for details about locking the look-up table. Table 13-8.
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Address / Default Register name Register data D7 D6 D5 D4 ••• D3 D2 D1 D0 0 1 0 1 1 0 1 1 ••• D Threshold = (5  150mV) + 250mV = 1V 1 1 1 0 ••• ••• D Threshold = (15  150mV) + 250mV = 2.5V x 1 1 0 13.11 Registers 0x60 and 0x61, EEPROM Access These registers control access to the EEPROM. See “EEPROM and Power-Up Defaults” and “EEPROM Address and Control/Status Registers” on page 26 for information. 13.
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Figure 14-1. I2C Interface Connections VI2C 2 x 2.2k TYPICAL 100k MASTER SDA SCL INT (µC) SDA SCL FLTB MSL2021 A transmission consists of a START condition sent by a master, a 7-bit slave address plus one R/W bit, an acknowledge bit, none or many data bytes each separated by an acknowledge bit, and a STOP condition (Figure 14-2, Figure 14-4 and Figure 14-5 on page 33). Figure 14-2.
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14.3 I2C START and STOP Conditions Both SCL and SDA remain high when the interface is free. The master signals a transmission with a START condition (S) by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP condition (P) by transitioning SDA from low to high while SCL is high. The bus is then free. Figure 14-4. I2C START and STOP Conditions SDA S P START CONDITION STOP CONDITION SCL 14.
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Figure 14-6. I2C Slave Address SDA A7 = 0 A6 = 1 A5 = 0 A4 = 0 A3 =0 A2 = 0 A1 = 0 R/W A 2 3 4 5 6 7 8 9 MSB SCL 14.6 1 I2C Message Format for Writing to the MSL2021 A write to the MSL2021 contains the MSL2021’s slave address, the R/W bit cleared to 0, and at least 1 byte of information (Figure 14-7 on page 34). The first byte of information is the register address byte.
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acknowledges. The pointer auto-increments during each master initiated acknowledge period. End the transmission with a not-acknowledge followed by a stop condition. Figure 14-9. I2C Reading Register Data with Preset Register Pointer ACKNOWLEDGE FROM MSL202x START SDA 0 1 0 0 0 0 0 1 A ACKNOWLEDGE FROM MASTER . D7 SLAVE ADDRESS, READ ACCESS . . . . . D0 A NOT ACKNOWLEDGE FROM MASTER . D7 READ REGISTER ADDRESS X . . . . .
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Figure 14-11. I2C Broadcast Writing a Data Byte ACKNOWLEDGE FROM MSL202x START SDA 0 0 0 0 0 0 0 0 A BROADCAST WRITE SLAVE ADDRESS 0 1 ACKNOWLEDGE FROM MSL202x 0 0 0 0 1 0 A D7 . ACKNOWLEDGE FROM MSL202x . . . . . D0 A D7 SETS ALL REGISTER POINTERS TO X MSL202x BROADCAST ID . ACKNOWLEDGE FROM MSL202x . . . . .
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d 0.1 C Packaging Information d 0.1 C (TOP VIEW) D 24 (SIDE VIEW) d 0.08 SEATING PLANE d 0.1 C 1 2 PIN 1 ID E A A1 (A3) D2 e/2 E2 COMMON DIMENSIONS (UNIT OF MEASURE=MM) e SYMBOL 24X L 24X b K 15. (BOTTOM VIEW) MIN NOM MAX A - 0.85 0.90 A1 0.00 - 0.05 0.203 REF A3 b 0.20 D D2 NOTES: 2. Dimension "b" applies to metalized terminal and is measured between 0.15mm and 0.30mm from the terminal tip.
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16. Datasheet Revision History 16.1 42062A – 02/2013 1. Initial revision.
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Table of Contents Features 1 Typical Applications 1 1. Introduction 2 2. Ordering Information 2 3. Application Circuit 2 4. Absolute Maximum Ratings 3 5. Electrical Characteristics 4 6. Block Diagram 11 7. Pinout and Pin Description 12 7.1 7.2 Pinout MSL2021 12 Pin Descriptions 12 8. Typical Application Circuit 14 9. Detailed Description 14 10. Fault Conditions 15 11. Applications Information 15 11.1 11.2 11.3 11.4 11.5 11.6 11.7 11.8 11.
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13.10 Efficiency Optimizer Control Register (EOCTRL, 0x40) 30 13.11 Registers 0x60 and 0x61, EEPROM Access 31 13.12 Password registers (PW(HIGH) and PW(LOW), 0x68 and 0x69) 31 14. I²C Serial Interface 31 14.1 14.2 14.3 14.4 14.5 14.6 14.7 14.
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