Datasheet
© 2009-2011 Microchip Technology Inc. Preliminary DS70590C-page 97
MRF49XA
INDEX
A
Absolute Maximum Ratings ................................................ 79
AC Characteristics
Other Timing Parameters............................................ 83
PLL Parameters .......................................................... 82
Receiver...................................................................... 81
Transmitter.................................................................. 82
Antenna Design Considerations ......................................... 74
Antenna/Balun .................................................................... 73
Automatic Frequency Control (AFC) ............................. 14, 50
B
Baseband Features............................................................... 3
Baseband/Data Filtering ..................................................... 56
Bill of Materials.................................................................... 77
Block Diagrams
AFC Circuit for Frequency Offset Correction .............. 51
Analog RSSI Voltage vs. RF Input Power................... 15
Application Circuit ....................................................... 73
Balun Circuit................................................................ 73
DIO Logic .................................................................... 58
Four Basic Copper FR4 Layers .................................. 74
Functional Node............................................................ 8
Logic Connection Between Power Control Bits .......... 63
MCU to MRF49XA Interface ......................................... 8
MRF49XA Architectural .............................................. 10
MRF49XA Interrupt Generation Logic......................... 55
RESET
Pin Internal Connection.................................. 45
Two Basic Copper FR4 Layers ................................... 74
TX Register Before Transmit ...................................... 66
TX Register During Transmit ...................................... 67
C
Clock Output ....................................................................... 11
Clock Recovery Circuit (CLKRC) ........................................ 14
Crystal Oscillator................................................................. 14
Crystal Oscillator and Clock Output .................................... 47
Crystal Selection Guidelines ............................................... 49
Current Consumption.......................................................... 80
Customer Change Notification Service ............................... 99
Customer Notification Service............................................. 99
Customer Support............................................................... 99
D
Data
Data In ........................................................................ 11
Data Out...................................................................... 11
Data Filtering and Clock Recovery ..................................... 14
Analog Operation ........................................................ 57
Digital Operation ......................................................... 57
Data Indicator Output (DIO) ................................................ 15
Data Quality Indicator (DQI).......................................... 15, 58
Data Validity Blocks
Data Indicator Output.................................................. 15
Data Quality Indicator ................................................. 15
Receive Signal Strength Indicator............................... 15
E
Electrical Characteristics..................................................... 79
Errata .................................................................................... 5
Examples
Frequency Deviation and BBBW Calculation.............. 56
External Reference Input .................................................... 12
F
FIFO Interrupt ..................................................................... 11
Frequency Shift Keying
Data ............................................................................ 11
FIFO Select ................................................................ 11
Functional Description ........................................................ 43
G
General PCB Layout Deign ................................................ 74
H
Hardware Description ........................................................... 9
I
I/O Pin Input Specifications................................................. 80
Initialization......................................................................... 52
Internet Address ................................................................. 99
Interrupt .............................................................................. 12
Interrupt Request Output .................................................... 11
Interrupts ............................................................................ 52
Clearing ...................................................................... 53
LBTD .......................................................................... 53
LCEXINT .................................................................... 53
POR............................................................................ 53
Setting ........................................................................ 53
TXOWRXOF............................................................... 53
TXRXFIFO.................................................................. 53
WUTINT...................................................................... 53
L
Low Duty Cycle Mode................................................... 16, 64
Low Noise Amplifier (LNA).................................................. 13
Low-Battery Voltage Detector............................................. 16
M
Memory Organization ......................................................... 18
Microchip Internet Web Site................................................ 99
O
Output
Filter Capacitor ........................................................... 11
P
Packaging
Details......................................................................... 90
Marking....................................................................... 89
Packaging Information ........................................................ 89
Performance Characteristics
BER Curves
In 433 MHz Band................................................ 86
In 868 MHz Band................................................ 86
Channel Selectivity and Blocking ............................... 85
Receiver Sensitivity Over Ambient Temperature
At 433 MHz......................................................... 88
At 868 MHz......................................................... 88
Phase Locked Loop (PLL) ............................................ 14, 48
Pin Description.................................................................... 11
Pin Diagram .......................................................................... 4
Pins
CLKOUT ..................................................................... 11
CS
............................................................................... 11
DATA .......................................................................... 11
FSK/DATA/FSEL
........................................................ 11
INT
/DIO ...................................................................... 12
IRO
............................................................................. 11
RCLKOUT/FCAP/FINT............................................... 11