Datasheet

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MRF49XA

TABLE 5-7: OTHER TIMING PARAMETERS AC CHARACTERISTICS

(1)

Note 1: Typical Values: TA = 25°C, VDD = 3.3V.

2: The crystal oscillator start-up time depends on the capacitance seen by the oscillator. Low capacitance and

low-ESR crystal are recommended with low parasitic PCB layout design.

3: During the Power-on Reset period, commands are not accepted by the chip. In case of Software Reset (see

WTSREG (Register 2-14)), the Reset time-out is typically 0.25 ms.

Parameters Condition Min Typ Max Unit

Transmitter Switch On Time Synthesizer off, crystal oscillator

on with 10 MHz step

—250— μs

Receiver Switch On Time Synthesizer off, crystal oscillator

on with 10 MHz step

—250— μs

Transmitter to Receiver Switch

Time

Synthesizer and crystal oscillator

on during TX/RX change with 10

MHz step

—150— μs

Receiver to Transmitter Switch

Time

Synthesizer and crystal oscillator

on during RX/TX change with 10

MHz step

—150— μs

Crystal Load Capacitance (See

Crystal Selection Guide)

Programmable in 0.5 pF steps,

tolerance ±10%

8.5 — 16 pF

Crystal Oscillator Start-up Time Default capacitance bank setting,

crystal ESR <50Ω. Crystal load

capacitance = 16 pF.

(2)

—2 7ms

Internal POR Time-out After VDD has reached 90% of the

final value

(3)

——100ms

Wake-up Timer Clock Accuracy Crystal oscillator must be enabled

to ensure proper calibration at the

start-up

(2)

—±10— %

Digital Input Capacitance — — — 2 pF

Digital Output Rise/Fall Time 15 pF pure capacitive load — — 10 ns