Datasheet
MRF49XA
DS70590C-page 82 Preliminary © 2009-2011 Microchip Technology Inc.
Note 1: Typical Values: TA = 25°C, VDD = 3.3V.
TABLE 5-6: PLL PARAMETERS AC CHARACTERISTICS
(1)
Note 1: Typical Values: TA = 25°C, VDD = 3.3V.
TABLE 5-5: TRANSMITTER AC CHARACTERISTICS
(1)
Parameters Condition Min Typ Max Unit
RF Carrier Frequency 433 MHz band, 2.5 kHz resolution 430.24 — 439.75 MHz
868 MHz band, 5.0 kHz resolution 860.48 — 879.51 MHz
915 MHz band, 7.5 kHz resolution 900.72 — 929.27 MHz
Maximum RF Output Power 433 MHz @ 50Ω load — 7 — dBm
868 MHz @ 50Ω load — 5 — dBm
915 MHz @ 50Ω load — 5 — dBm
RF Output Power Control Range In steps of 8 P
max – 17.5 — Pmax dBm
TX Gain Control Resolution Programmed in 8 steps — 2.5 — dB
Harmonic Suppression At maximum power, 50Ω load — — -35 dBc
Open-Collector Output DC
Current
Programmable 0.5 — 6 mA
Spurious Emission
| f-f
sp | > 1 MHz
At maximum power, 50Ω load — — -55 dBc
Output Capacitance (Set by the
Automatic Antenna Tuning
Circuit)
433 MHz band 2 2.6 3.2 pF
868 MHz band 2.1 2.7 3.3 pF
915 MHz band 2.1 2.7 3.3 pF
Quality Factor of the Output
Capacitance
433 MHz band 13 15 17 —
868 MHz band 8 10 12 —
915 MHz band 8 10 12 —
Output Phase Noise 100 kHz from carrier — -80 — dBc/Hz
1 MHz from carrier — -103 — dBc/Hz
FSK Bit Rate Internal TX Data register — — 172 kbps
FSK Bit Rate TX data connected to the FSK
input
— — 256 kbps
FSK Frequency Deviation Programmable in 15 kHz steps 15 — 240 kHz
Parameters Condition/Note Min Typ Max Unit
PLL Reference Frequency Crystal related timing and fre-
quency parameters change
according to the PLL reference
frequency
91011MHz
PLL Lock Time Frequency error <1 kHz after
10 MHz step
—30—μs
PLL Start-up Time With a running crystal oscillator
and based on the design
— 200 300 μs