Datasheet
© 2009-2011 Microchip Technology Inc. Preliminary DS70590C-page 69
MRF49XA
FIGURE 3-16: TX REGISTER USAGE
FIGURE 3-17: MULTIPLE BYTE WRITE WITH TRANSMIT REGISTER
SPI
Commands
GENCREG PMCREG
TX Latch TX Latch
PMCREG GENCREG
TXDEN = 1
TX Byte 1
Dummy
TX Byte
TXCEN = 0 TXDEN = 0TXCEN = 1
Synt.
PA
Ttx_xtal_on
(1)
TXCEN
Enable
Synthesizer/PA
0xAA
Fraction of the dummy byte
0xAA TX Byte1
TX Data
SDO
(2)
Do not switch the TXCEN off here, because the TX
Byte 1 is not transmitted out, it is only stored in the
internal register
Enabling the transmitter preloads the TX latch with
0xAAAA
(CS, SCK, SDI)
Note 1: Ttx_xtal_on is the start-up time of PLL + PA with a running crystal oscillator.
2: SDO is a tri-state of CS.
IRO
* The device is in Transmit (TX) mode when the RXCEN bit is cleared using the PMCREG.
Transmit Register Write
TX BYTE 1
TX BYTE 2
TX BYTE n
SDO
(Register interrupt in TX mode*)
SCK
SDI
CS