Datasheet

MRF49XA
DS70590C-page 66 Preliminary © 2009-2011 Microchip Technology Inc.
3.17 TX Register Buffered Data
Transmission
In Data Transmission mode (enabled by the TXDEN bit
(GENCREG<7>)), the TX data is clocked into one of
the two 8-bit data registers. The transmitter starts to
send the data from the first register (with the given bit
rate) when the TXCEN bit (PMCREG<5>) is set. The
initial value of the data registers (0xAA) can be used to
generate preamble. During this mode, the SDO pin is
monitored to check whether the register is ready (SDO
is high) to receive the next byte from the
microcontroller. The block diagrams of the Transmit
register, before and during transmit, are shown in
Figure 3-14 and Figure 3-15, respectively.
The transmitter FSK modulation parameters are used
for calculating the resulting output frequency, as shown
in Equation 3-6.
EQUATION 3-6:
FIGURE 3-14: TX REGISTER BLOCK DIAGRAM (BEFORE TRANSMIT)
fFSKOUT = f0 + (-1)SIGN x (MB + 1) x (15 kHz)
where:
f
0 is the Channel Center Frequency
(see Register 2-6 for f
0 calculation)
MB is the 4-bit Binary Number (MODBW<3:0>)
SIGN = MODPLY
XOR FSK
8-Bit Shift Register
(Default: AAh)
8-Bit Shift Register
(Default: AAh)
Serial Bus Data
SCLK
CLK
SDI
CLK
SDI
SDO
SDO
TX_DATA
TXCEN = 0
(Register Initial Fill-up)