Datasheet
MRF49XA
DS70590C-page 46 Preliminary © 2009-2011 Microchip Technology Inc.
3.2 VDD Line Filtering
During the Reset event (caused by power-on, glitch on
the supply line or Software Reset), the V
DD line should
be kept clean. Noise or a periodic disturbing signal
superimposed on the supply voltage may prevent the
device from getting out of the Reset state. To avoid this,
adequate filters should be made available on the power
supply lines to keep the distorting signal level
below 100 mVp-p, in the DC-50 kHz range for 200 ms,
from V
DD ramp start. The usage of regulators or SMPS
may sometimes introduce switching noise on the V
DD
line, so follow the power supply manufacturer’s
recommendations on how to decrease the ripple of
regulator IC and/or how to shift the switching frequency
while using SMPS.
The registers associated with power line filtering are:
•STSREG (see Register 2-1)
• FIFORSTREG (see Register 2-10)
• WTSREG (see Register 2-14)