Datasheet

MRF49XA

W-1 W-0 W-0 W-1 W-1 W-0 W-0 W-0

CCB<15:9> MODPLY

bit 15 bit 8

W-0 W-0 W-0 W-0 W-0 W-0 W-0 W-0

MODBW<3:0>

r OTXPWR<2:0>

bit 7 bit 0

Legend: r = reserved bit

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 15-9 CCB<15:9>: Command Code bits

The command code bits (1001100b) are serially sent to the microcontroller to identify the bits to be

written in the TXCREG.

bit 8 MODPLY: Modulation Polarity bit (for FSK)

When MODPLY is configured as high/low:

1 = Logic ‘0’ is the higher channel frequency and logic ‘1’ is the lower channel frequency (negative

deviation)

0 = Logic ‘0’ is the lower channel frequency and logic ‘1’ is the higher channel frequency (positive

deviation)

bit 7-4 MODBW<3:0>: Modulation Bandwidth bits

These bits set the FSK frequency deviation for transmitting the logic ‘1’ and logic ‘0’

(1)

1111 = 240 kHz

1110 = 225 kHz

1101 = 210 kHz

1100 = 195 kHz

1011 = 180 kHz

1010 = 165 kHz

1001 = 150 kHz

1000 = 135 kHz

0111 = 120 kHz

0110 = 105 kHz

0101 = 90 kHz

0100 = 75 kHz

0011 = 60 kHz

0010 = 45 kHz

0001 = 30 kHz

0000 = 15 kHz

bit 3 Reserved: Write as ‘0’

Note 1: The transmitter FSK modulation parameters are used for calculating the resulting output frequency, as

shown in Equation 2-1.

2: The output transmit power range is relative to the maximum available power, which depends on the actual

antenna impedance.