Datasheet

© 2009 Microchip Technology Inc. DS22153C-page 39
MCP9843/98243
5.3.3.3 PWP (Permanent Write Protect)
Once the PWP register is written, the lower half of the
memory will be permanent protected and the device
will not acknowledge any command. The protected
area of the memory can not be cleared, reversed, or re-
written. If a write is attempted to the protected area, the
device will acknowledge the address byte and word
address but not the data byte. (See Tab le 5 -4 and
Table 5-5).
Unlike SWP and CWP, a V
HV
is not applied on the A0
pin to execute PWP. The state of A2, A1, and A0 is user
selectable. However, the address pin states need to
match the slave address bits, as shown in Table 5-3.
FIGURE 5-17: Timing Diagram for Setting Permanent Write Protect (See Section 4.0 “Serial
Communication”).
Note: Once the Permanent Write-Protect is
executed, it cannot be reversed, even if the
device power is cycled. See Figure 2-13
for V
HV
voltage levels.
SDA
A
C
K
0110
A
A
C
K
S
2
A
1
A
0
12345678 12345678
SCL
Address Byte
W
MCP98243
MCP98243
A
C
K
P
12345678
Data
Word Address
MCP98243
XXXXX
XXX XXXXX
XXX
Note: Unlike SWP and CWP, V
HV
must be within the range of GND to V
DD
+ 1V to execute PWP.
See Figure 2-13 and Section 5.3.3 “Write Protection”.