Datasheet

© 2007-2011 Microchip Technology Inc. DS22071B-page 21
MCP73837/8
EQUATION 6-1:
For example, power dissipation with a 5V, ±10% input
voltage source and 500 mA, ±10% fast charge current
is:
EXAMPLE 6-1:
This power dissipation with the battery charger in the
MSOP-10 package will cause thermal regulation to be
entered as depicted in Figure 6-3. Alternatively, the
3 mm x 3 mm DFN package could be utilized to reduce
the charge cycle times.
6.1.1.3 External Capacitors
The MCP73837/8 is stable with or without a battery
load. In order to maintain good AC stability in the
Constant Voltage mode, a minimum capacitance of
1 µF is recommended to bypass the V
BAT
pin to V
SS
.
This capacitance provides compensation when there is
no battery load. In addition, the battery and
interconnections appear inductive at high frequencies.
These elements are in the control feedback loop during
Constant Voltage mode. Therefore, the bypass
capacitance may be necessary to compensate for the
inductive nature of the battery pack.
Virtually any good quality output filter capacitor can be
used, independent of the capacitor’s minimum
Effective Series Resistance (ESR) value. The actual
value of the capacitor (and its associated ESR)
depends on the output load current. A 1 µF ceramic,
tantalum, or aluminum electrolytic capacitor at the
output is usually sufficient to ensure stability for output
currents up to 500 mA.
6.1.1.4 Reverse-Blocking Protection
The MCP73837/8 provides protection from a faulted or
shorted input. Without the protection, a faulted or
shorted input would discharge the battery pack through
the body diode of the internal pass transistor.
6.1.1.5 Charge Inhibit
The current regulation set input pin (PROG1/2) can be
used to terminate a charge at any time during the
charge cycle, as well as to initiate a charge cycle or
initiate a recharge cycle.
Placing a programming resistor from the PROG1 input
to V
SS
or driving PROG2 to logic High or Low enables
the device. Allowing either the PROG1 or PROG2 input
float disables the device and terminates a charge cycle.
When disabled, the device’s supply current is reduced
to 75 µA, typically.
6.1.1.6 Temperature Monitoring
The charge temperature window can be set by placing
fixed value resistors in series-parallel with a thermistor.
The resistance values of R
T1
and R
T2
can be calculated
with the following equations in order to set the
temperature window of interest.
For NTC thermistors:
EQUATION 6-2:
For example, by utilizing a 10 kΩ at 25°C NTC
thermistor with a sensitivity index, β, of 3892, the
charge temperature range can be set to 0°C - 50°C by
placing a 1.54 kΩ resistor in series (R
T1
), and a
69.8 kΩ resistor in parallel (R
T2
) with the thermistor.
6.1.1.7 Charge Status Interface
A status output provides information on the state of
charge. The output can be used to illuminate external
LEDs or interface to a host microcontroller. Refer to
Figure 5-1 for a summary of the state of the status
output during a charge cycle.
6.2 PCB Layout Issues
For optimum voltage regulation, place the battery pack
as close as possible to the device’s V
BAT
and V
SS
pins,
recommended to minimize voltage drops along the
high current-carrying PCB traces.
If the PCB layout is used as a heat sink, adding many
vias in the heatsink pad can help conduct more heat to
the backplane of the PCB, thus reducing the maximum
junction temperature.
PowerDissipat ion V
DDMAX
V
PTHMIN
–()I
REGMAX
×=
Where:
V
DDMAX
= the maximum input voltage
I
REGMAX
= the maximum fast charge current
V
PTHMIN
= the minimum transition threshold
voltage
PowerDissipation 5.5V 2.7V–()550mA × 1.54W==
24k Ω R
T1
R
T2
R
COLD
×
R
T2
R+
COLD
---------------------------------+=
5k
Ω R
T1
R
T2
R
HOT
×
R
T2
R+
HOT
-----------------------------+=
Where:
R
T1
= the fixed series resistance
R
T2
= the fixed parallel resistance
R
COLD
= the thermistor resistance at the
lower temperature of interest
R
HOT
= the thermistor resistance at the
upper temperature of interest