Datasheet

MCP73833/4

5.2.2 POWER GOOD (PG) OPTION

The power good (PG) option is a pseudo open-drain

output. The PG

output can sink current, but not source

current. However, there is a diode path back to the

input, and as such, the PG output should only be pulled

up to the input. The PG

output is low whenever the

input to the MCP73833 is above the UVLO threshold

and greater than the battery voltage. If the supply

voltage is above the UVLO, but below

REG

(Typical)+0.3V, the MCP73833 will pulse the PG

output as the device determines if a battery is present.

5.2.3 TIMER ENABLE (TE) OPTION

The timer enable (TE) input option is used to enable or

disable the internal timer. A low signal on this pin

enables the internal timer and a high signal disables

the internal timer. The TE

input can be used to disable

the timer when the charger is supplying current to

charge the battery and power the system load. The TE

input is compatible with 1.8V logic.

5.2.4 DEVICE DISABLE (PROG)

The current regulation set input pin (PROG) can be

used to terminate a charge at any time during the

charge cycle, as well as to initiate a charge cycle or

initiate a recharge cycle.

Placing a programming resistor from the PROG input to

enables the device. Allowing the PROG input to

float or by applying a logic-high input signal, disables

the device and terminates a charge cycle. When

disabled, the device’s supply current is reduced to

100 µA, typically.