Datasheet

© 2011 Microchip Technology Inc. DS25007B-page 3
MCP6V26/7/8
1.0 ELECTRICAL
CHARACTERISTICS
1.1 Absolute Maximum Ratings †
V
DD
–V
SS
..............................................................................6.5V
Current at Input Pins †† ......................................................±2 mA
Analog Inputs (V
IN
+ and V
IN
–) †† .......... V
SS
– 1.0V to V
DD
+1.0V
All other Inputs and Outputs .................. V
SS
– 0.3V to V
DD
+0.3V
Difference Input voltage ............................................. |V
DD
–V
SS
|
Output Short Circuit Current .......................................Continuous
Current at Output and Supply Pins ...................................±30 mA
Storage Temperature ..........................................-65°C to +150°C
Max. Junction Temperature .............................................. +150°C
ESD protection on all pins (HBM, CDM, MM) ≥ 4 kV,1.5 kV, 300V
†Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at those or any other
conditions above those indicated in the operational
listings of this specification is not implied. Exposure to
maximum rating conditions for extended periods may
affect device reliability.
†† See Section 4.2.1, Rail-to-Rail Inputs
.
1.2 Specifications
TABLE 1-1: DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.3V to +5.5V, V
SS
= GND,
V
CM
= V
DD
/3, V
OUT
=V
DD
/2, V
L
=V
DD
/2, R
L
= 10 kΩ to V
L
and CS = GND (refer to Figure 1-5 and Figure 1-6).
Parameters Sym Min Typ Max Units Conditions
Input Offset
Input Offset Voltage V
OS
-2 — +2 µV T
A
= +25°C (Note 1)
Input Offset Voltage Drift
with Temperature (linear Temp. Co.)
TC
1
-50 — +50 nV/°C T
A
= -40 to +125°C
(Note 1)
Input Offset Voltage Quadratic
Temperature Coefficient
TC
2
—±0.2 —nV/°C
2
T
A
= -40 to +125°C
Power Supply Rejection PSRR 125 142 — dB (Note 1)
Input Bias Current and Impedance
Input Bias Current I
B
—+7 —pA
Input Bias Current across
Temperature
I
B
—+110 — pAT
A
= +85°C
I
B
—+1.2 +5 nAT
A
= +125°C
Input Offset Current I
OS
—±70 — pA
Input Offset Current across
Temperature
I
OS
—±50 — pAT
A
= +85°C
I
OS
—±60 — pAT
A
= +125°C
Common Mode Input Impedance Z
CM
—10
13
||12 — Ω||pF
Differential Input Impedance Z
DIFF
—10
13
||12 — Ω||pF
Note 1: Set by design and characterization. Due to thermal junction and other effects in the production
environment, these parts can only be screened in production (except TC
1
; see Appendix B: “Offset
Related Test Screens”).
2: Figure 2-18 shows how V
CML
and V
CMH
changed across temperature for the first production lot.