Datasheet

 2004 Microchip Technology Inc. DS21908A-page 9
MCP6S91/2/3
FIGURE 1-6: Output Voltage Model with
the standard condition V
REF
=V
SS
=0V.
1.1.3 OUTPUT NON-LINEARITY
Figure 1-7 shows the Integral Non-Linearity (INL) of the
output voltage.
EQUATION 1-5:
The output non-linearity specification in the Electrical
Specifications (with units of: % of FSR) is related to
Figure 1-7 by:
EQUATION 1-6:
The Full-Scale Range (FSR) is V
DD
– 0.6V
(0.3V to V
DD
– 0.3V).
FIGURE 1-7: Output Voltage INL with the
standard condition V
REF
=V
SS
=0V.
1.1.4 DIFFERENT V
REF
CONDITIONS
Some of the plots in Section 2.0 “Typical Performance
Curves”, have the conditions V
REF
=V
DD
/2 or
V
REF
=V
DD
. The equations and figures above are easily
modified for these conditions. The ideal V
OUT
equation
becomes:
EQUATION 1-7:
The complete linear model is:
EQUATION 1-8:
where the new V
IN
end points are:
EQUATION 1-9:
The equations for extracting the specifications do not
change.
0
0
0.3
V
DD
– 0.3
V
DD
V
O
U
T
V
OUT
(V)
V
IN
(V)
0.3 V
DD
– 0.3 V
DD
GGG
V
1
V
O
_
I
D
V
O
_
L
I
N
V
2
INL V
OUT
V
O_LIN
–=
V
ONL
max V
3
V
4
,()
V
DD
0.6V–
-------------------------------
100%⋅=
0
INL (V)
V
IN
(V)
0.3 V
DD
– 0.3 V
DD
GGG
0
V
3
V
4
V
O_ID
V
REF
GV
IN
V
REF
–()+=
V
DD
V
REF
V
SS
0V=>≥
V
ON_LIN
G1 g
E
+()V
IN
V
IN_L
V
OS
+–()0.3V+=
V
REF
V
SS
0V==
V
IN_L
0.3V V
REF
–
G
------------------------------
V
REF
+=
V
IN_H
V
DD
0.3V– V
REF
–
G
-----------------------------------------------
V
REF
+=