Datasheet

 2004 Microchip Technology Inc. DS21908A-page 3
MCP6S91/2/3
Ladder Resistance
Ladder Resistance R
LAD
3.4 4.9 6.4 kΩ (Note 1)
Ladder Resistance across
Temperature
∆R
LAD
/∆T
A
—+0.028 — %/°CT
A
= -40°C to +125°C (Note 1)
Amplifier Output
DC Output Non-linearity G = +1 V
ONL
— ±0.18 — % of FSR V
OUT
≈ 0.3V to V
DD
− 0.3V, V
DD
=5.0V
G ≥ +2 V
ONL
— ±0.050 — % of FSR V
OUT
≈ 0.3V to V
DD
− 0.3V, V
DD
=5.0V
Maximum Output Voltage Swing V
OH_ANA
,
V
OL_ANA
V
SS
+ 20 — V
DD
– 100 mV G ≥ +2; 0.5V output overdrive
V
SS
+ 60 — V
DD
– 60 G ≥ +2; 0.5V output overdrive,
V
REF
= V
DD
/2
Short Circuit Current I
SC
—±25 — mA
Power Supply
Supply Voltage V
DD
2.5 — 5.5 V
Minimum Valid Supply Voltage V
DD_VAL
— 0.4 2.0 V Register data still valid
Quiescent Current I
Q
0.4 1.0 1.6 mA I
O
= 0 (Note 3)
Quiescent Current, Shutdown
Mode
I
Q_SHDN
—30 — pAI
O
= 0 (Note 3)
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.5V to +5.5V, V
SS
= GND, V
REF
= V
SS
, G = +1 V/V,
Input = CH0 = (0.3V)/G, CH1 = 0.3V, R
L
=10kΩ to V
DD
/2, SI and SCK are tied low and CS is tied high.
Parameters Sym Min Typ Max Units Conditions
Note 1: R
LAD
(R
F
+R
G
in Figure 4-1) connects V
REF
, V
OUT
and the inverting input of the internal amplifier. The MCP6S92 has
V
REF
tied internally to V
SS
, so V
SS
is coupled to the internal amplifier and the PSRR spec describes PSRR+ only. It is
recommended that the MCP6S92’s V
SS
pin be tied directly to ground to avoid noise problems.
2: The MCP6S92’s V
IVR
and V
IVR_REF
are not tested in production; they are set by design and characterization.
3: I
Q
includes current in R
LAD
(typically 60 µA at V
OUT
= 0.3V). Both I
Q
and I
Q_SHDN
exclude digital switching currents.