Datasheet
2004 Microchip Technology Inc. DS21908A-page 23
MCP6S91/2/3
5.2.3 SETTING THE GAIN
The amplifier can be programmed to produce binary
and decimal gain settings between +1 V/V and +32 V/V.
Register 5-2 shows the details. At the same time, differ-
ent compensation capacitors are selected to optimize
the bandwidth vs. slew rate trade-off (see Table 4-1).
REGISTER 5-2: GAIN REGISTER
U-x U-x U-x U-x U-x W-0 W-0 W-0
— — — — —G2G1G0
bit 7 bit 0
bit 7-3 Unimplemented: Read as ‘0’ (reserved for future use)
bit 2-0 G2-G0: Gain Select bits
000 = Gain of +1
001 = Gain of +2
010 = Gain of +4
011 = Gain of +5
100 = Gain of +8
101 = Gain of +10
110 = Gain of +16
111 = Gain of +32
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown