Datasheet
MCP6N11
DS25073A-page 4 © 2011 Microchip Technology Inc.
Input Current and Impedance (Note 4)
Input Bias Current I
B
— 10 — pA all
Across Temperature — 80 — pA T
A
= +85°C
Across Temperature 0 2 5 nA T
A
= +125°C
Input Offset Current I
OS
—±1—pA
Across Temperature — ±5 — pA T
A
= +85°C
Across Temperature -1 ±0.05 +1 nA T
A
= +125°C
Common Mode Input
Impedance
Z
CM
—10
13
||6 — Ω||pF
Differential Input
Impedance
Z
DIFF
—10
13
||3 — Ω||pF
Input Common Mode Voltage (V
CM
or V
REF
) (Note 4)
Input Voltage Range V
IVL
——V
SS
− 0.2 V all (Note 5, Note 6)
V
IVH
V
DD
+0.15 — — V
Common Mode
Rejection Ratio
CMRR 62 79 — dB 1 V
CM
= V
IVL
to V
IVH
,
V
DD
=1.8V
69 87 — dB 2
75 101 — dB 5
79 107 — dB 10
86 119 — dB 100
70 94 — dB 1 V
CM
= V
IVL
to V
IVH
,
V
DD
=5.5V
78 100 — dB 2
80 108 — dB 5
81 114 — dB 10
88 115 — dB 100
Common Mode
Non-Linearity
INL
CM
-1000 ±115 +1000 ppm 1 V
CM
= V
IVL
to V
IVH
,
V
DM
=0V,
V
DD
=1.8V (Note 7)
-570 ±27 +570 ppm 2
-230 ±11 +230 ppm 5
-125 ±6 +125 ppm 10
-50 ±2 +50 ppm 100
-400 ±42 +400 ppm 1 V
CM
= V
IVL
to V
IVH
,
V
DM
=0V,
V
DD
=5.5V (Note 7)
-220 ±10 +220 ppm 2
-100 ±4 +100 ppm 5
-50 ±2 +50 ppm 10
-30 ±1 +30 ppm 100
TABLE 1-1: DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, T
A
=+25°C, V
DD
= 1.8V to 5.5V, V
SS
= GND, EN/CAL =V
DD
,
V
CM
=V
DD
/2, V
DM
=0V, V
REF
=V
DD
/2, V
L
=V
DD
/2, R
L
=10kΩ to V
L
and G
DM
=G
MIN
; see Figure 1-6 and Figure 1-7.
Parameters Sym Min Typ Max Units G
MIN
Conditions
Note 1: V
CM
= (V
IP
+ V
IM
) / 2, V
DM
= (V
IP
– V
IM
) and G
DM
= 1 + R
F
/R
G
.
2: The V
OS
spec limits include 1/f noise effects.
3: This is the input offset drift without V
OS
re-calibration; toggle EN/CAL to minimize this effect.
4: These specs apply to both the V
IP
, V
IM
input pair (use V
CM
) and to the V
REF
, V
FG
input pair (V
REF
takes V
CM
’s place).
5: This spec applies to the V
IP
, V
IM
, V
REF
and V
FG
pins individually.
6: Figure 2-11 and Figure 2-19 show the V
IVR
and V
DMR
variation over temperature.
7: See Section 1.5 “Explanation of DC Error Specs”.