Datasheet

© 2011 Microchip Technology Inc. DS25073A-page 3
MCP6N11
1.0 ELECTRICAL
CHARACTERISTICS
1.1 Absolute Maximum Ratings †
V
DD
–V
SS
.......................................................................6.5V
Current at Input Pins †† ...............................................±2 mA
Analog Inputs (V
IP
and V
IM
) †† ..... V
SS
– 1.0V to V
DD
+1.0V
All Other Inputs and Outputs ......... V
SS
– 0.3V to V
DD
+0.3V
Difference Input Voltage....................................... |V
DD
–V
SS
|
Output Short Circuit Current ................................Continuous
Current at Output and Supply Pins ............................±30 mA
Storage Temperature ...................................-65°C to +150°C
Max. Junction Temperature ........................................ +150°C
ESD protection on all pins (HBM, CDM, MM) .≥ 2 kV, 1.5 kV, 300V
†Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at those or any other
conditions above those indicated in the operational
listings of this specification is not implied. Exposure to
maximum rating conditions for extended periods may
affect device reliability.
†† See Section 4.2.1.2 “Input Voltage Limits” and
Section 4.2.1.3 “Input Current Limits”.
1.2 Specifications
TABLE 1-1: DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, T
A
=+25°C, V
DD
= 1.8V to 5.5V, V
SS
= GND, EN/CAL =V
DD
,
V
CM
=V
DD
/2, V
DM
=0V, V
REF
=V
DD
/2, V
L
=V
DD
/2, R
L
=10kΩ to V
L
and G
DM
=G
MIN
; see Figure 1-6 and Figure 1-7.
Parameters Sym Min Typ Max Units G
MIN
Conditions
Input Offset
Input Offset Voltage,
Calibrated
V
OS
-3.0 — +3.0 mV 1 (Note 2)
-2.0 — +2.0 mV 2
-0.85 — +0.85 mV 5
-0.50 — +0.50 mV 10
-0.35 — +0.35 mV 100
Input Offset Voltage
Trim Step
V
OSTRM
—0.36—mV1
—0.21—mV2
—0.077—mV5
—0.045—mV10
—0.014—mV100
Input Offset Voltage
Drift
ΔV
OS
/ΔT
A
—±90/G
MIN
— µV/°C 1 to 10 T
A
= -40°C to +125°C
(Note 3)
— ±2.7 — µV/°C 100
Power Supply
Rejection Ratio
PSRR 62 82 — dB 1
68 88 — dB 2
75 96 — dB 5
81 102 — dB 10
86 112 — dB 100
Note 1: V
CM
= (V
IP
+ V
IM
) / 2, V
DM
= (V
IP
– V
IM
) and G
DM
= 1 + R
F
/R
G
.
2: The V
OS
spec limits include 1/f noise effects.
3: This is the input offset drift without V
OS
re-calibration; toggle EN/CAL to minimize this effect.
4: These specs apply to both the V
IP
, V
IM
input pair (use V
CM
) and to the V
REF
, V
FG
input pair (V
REF
takes V
CM
’s place).
5: This spec applies to the V
IP
, V
IM
, V
REF
and V
FG
pins individually.
6: Figure 2-11 and Figure 2-19 show the V
IVR
and V
DMR
variation over temperature.
7: See Section 1.5 “Explanation of DC Error Specs”.