Datasheet

MCP6L1/1R/2/4
DS22135C-page 12  2009-2012 Microchip Technology Inc.
4.4 Supply Bypass
With this family of operational amplifiers, the power
supply pin (V
DD
for single supply) should have a local
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high-frequency performance. It also needs a
bulk capacitor (i.e., 1 µF or larger) within 100 mm to
provide large, slow currents. This bulk capacitor can be
shared with other nearby analog parts.
4.5 Unused Op Amps
An unused op amp in a quad package (e.g., MCP6L4)
should be configured, as shown in Figure 4-4. These
circuits prevent the output from toggling and causing
crosstalk. Circuit A sets the op amp at its minimum noise
gain. The resistor divider produces any desired refer-
ence voltage within the output voltage range of the op
amp; the op amp buffers that reference voltage. Circuit B
uses the minimum number of components and operates
as a comparator, but it may draw more current.
FIGURE 4-4: Unused Op Amps.
4.6 PCB Surface Leakage
In applications where low input bias current is critical,
the PCB (Printed Circuit Board) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 10
12
. A 5V difference would
cause 5 pA of current to flow; this is greater than this
family’s bias current at +25°C (1 pA, typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
Figure 4-5 shows an example of this type of layout.
FIGURE 4-5: Example Guard Ring Layout.
1. Inverting Amplifiers (Figure 4-5) and
Transimpedance Gain Amplifiers (convert
current to voltage, such as photo detectors).
a) Connect the guard ring to the non-inverting
input pin (V
IN
+); this biases the guard ring
to the same reference voltage as the op
amp’s input (e.g., V
DD
/2 or ground).
b) Connect the inverting pin (V
IN
-) to the input
with a wire that does not touch the PCB
surface.
2. Non-Inverting Gain and Unity Gain Buffer.
a) Connect the guard ring to the inverting input
pin (V
IN
-); this biases the guard ring to the
common-mode input voltage.
b) Connect the non-inverting pin (V
IN
+) to the
input with a wire that does not touch the
PCB surface.
4.7 Application Circuits
4.7.1 ACTIVE LOW-PASS FILTER
Figure 4-6 shows a second-order Butterworth filter,
with a 10 Hz cutoff frequency and a gain of +1 V/V,
using a Sallen Key topology. Microchip’s FilterLab
®
software designed the filter, then the capacitors were
reduced in value (using the same program).
FIGURE 4-6: Sallen Key Topology.
Figure 4-7 shows a filter with the same requirements,
except the gain is -1 V/V, in a Multiple Feedback
Topology. It was designed in a similar fashion using
FilterLab.
FIGURE 4-7: Multiple Feedback Topology.
V
DD
V
DD
¼ MCP6L4 (A) ¼ MCP6L4 (B)
R
1
R
2
V
DD
V
REF
V
REF
V
DD
R
2
R
1
R
2
+
-------------------=
Guard Ring V
IN
-V
IN
+
R
1
V
IN
V
OUT
R
2
18.2 k 29.4 k
MCP6L1
C
2
470 nF
C
1
1.0 µF
R
1
V
IN
V
OUT
R
3
54.9 k 25.5 k
MCP6L1
C
2
820 nF
C
1
220 nF
V
DD
/2
R
2
25.5 k