MCP6G01/1R/1U/2/3/4 110 µA Selectable Gain Amplifier Features Description • 3 Gain Selections: - +1, +10, +50 V/V • One Gain Select Input per Amplifier • Rail-to-Rail Input and Output • Low Gain Error: ±1% (max.) • High Bandwidth: 250 kHz to 900 kHz (typ.) • Low Supply Current: 110 µA (typ.) • Single Supply: 1.8V to 5.5V • Extended Temperature Range: -40°C to +125°C The Microchip Technology Inc. MCP6G01/1R/1U/2/3/4 are analog Selectable Gain Amplifiers (SGA).
MCP6G01/1R/1U/2/3/4 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings † VDD – VSS ........................................................................7.0V Current at Analog Input Pin (VIN) ......................................±2 mA Analog Input (VIN) †† ..................... VSS – 1.0V to VDD + 1.0V All other Inputs and Outputs........... VSS – 0.3V to VDD + 0.3V Output Short Circuit Current...................................continuous Current at Output and Supply Pins .........................
MCP6G01/1R/1U/2/3/4 DC ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, G = +1 V/V, VIN = (0.3V)/G, RL = 100 kΩ to VDD/2, GSEL = VDD/2, and CS is tied low. Parameters Sym Min Typ Max Units VDD 1.8 — 5.
MCP6G01/1R/1U/2/3/4 DIGITAL ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, TA = 25°C, VDD = +1.8V to +5.5V, VSS = GND, G = +1 V/V, VIN = (0.3V)/G, RL = 100 kΩ to VDD/2, CL = 60 pF, GSEL = VDD/2, and CS is tied low. Parameters Sym Min Typ Max Units Conditions CS Logic Threshold, Low VCSL 0 — 0.2VDD V CS = 0V CS Input Current, Low ICSL — 30 — pA CS = 0V CS Logic Threshold, High VCSH 0.8VDD — VDD V CS = VDD CS Input Current, High ICSH — 0.
MCP6G01/1R/1U/2/3/4 DIGITAL ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, TA = 25°C, VDD = +1.8V to +5.5V, VSS = GND, G = +1 V/V, VIN = (0.3V)/G, RL = 100 kΩ to VDD/2, CL = 60 pF, GSEL = VDD/2, and CS is tied low. Parameters Sym Min Typ Max Units GSEL High to Valid Output Time, G = +10 to +50 Select tGSH10 — 12 — µs VIN = 30 mV, GSEL = 0.75VDD to VOUT = 1.
MCP6G01/1R/1U/2/3/4 CS tCSON VOUT IDD ISS ICS FIGURE 1-2: DS22004B-page 6 tCSOFF 0.9VDD High-Z High-Z 110 µA (typ.) 120 pA (typ.) –VDD / 7 MΩ (typ.) –110 µA (typ.) VDD / 7 MΩ (typ.) 30 pA (typ.) SGA Chip Select Timing Diagram. © 2006 Microchip Technology Inc.
MCP6G01/1R/1U/2/3/4 1.1 DC Output Voltage Specs / Model 1.1.1 IDEAL MODEL The ideal SGA output voltage (VOUT) is (see Figure 1-3): The DC Gain Drift (ΔG/ΔTA) can be calculated from the change in gE across temperature.
MCP6G01/1R/1U/2/3/4 INL (V) V4 0 V3 0 0.3 G FIGURE 1-4: DS22004B-page 8 VDD-0.3 VDD G G VIN (V) Output Voltage INL. © 2006 Microchip Technology Inc.
MCP6G01/1R/1U/2/3/4 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
MCP6G01/1R/1U/2/3/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, G = +1 V/V, VIN = (0.3V)/G, RL = 100 kΩ to VDD/2, CL = 60 pF, GSEL = VDD/2, and CS is tied low. VIN 5 VDD = 5.0V G = +1 V/V VOUT 4 3 2 1 0 -10.0E+00 1.0E-03 2.0E-03 3.0E-03 4.0E-03 5.0E-03 6.0E-03 7.0E-03 8.0E-03 9.0E-03 0 -10 RS = 1 MΩ -20 R = 100 kΩ S -30 RS = 10 kΩ -40 -50 -60 -70 -80 -90 -100 -110 -120 1k 1.E+03 1.
MCP6G01/1R/1U/2/3/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, G = +1 V/V, VIN = (0.3V)/G, RL = 100 kΩ to VDD/2, CL = 60 pF, GSEL = VDD/2, and CS is tied low. In Shutdown Mode VIN = VDD/2 CS = VDD -2 -3 ISS_SHDN -4 -5 -6 -7 0 -8 -2 -3 VDD = 1.8V -4 -5 -6 VDD = 5.5V -7 -8 -9 -50 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Power Supply Voltage (V) FIGURE 2-13: Quiescent Current (ISS) in Shutdown Mode vs. Supply Voltage. 1,000 VDD = 5.
MCP6G01/1R/1U/2/3/4 VDD = +1.8V Representative Part 1 0 G = +1 -1 G = +10 G = +50 -2 -3 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 Ideal Output Voltage; GVIN (V) G = +10 G = +50 -1 -2 -3 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Ideal Output Voltage; GVIN (V) FIGURE 2-22: Output Voltage Error vs. Ideal Output Voltage, with VDD = 5.5V. 4.0 1000 Output Voltage Headroom; VDD–V OH and V OL–V SS (mV) VDD = +1.8V VDD – VOH VDD = +5.5V VOL – VSS 1 0.01 0.1 1 Output Current Magnitude (mA) 10k 1.
MCP6G01/1R/1U/2/3/4 Slew Rate (V/µs) 0.6 G = +1 V/V 0.5 VDD = 5.5V Output Voltage Swing (V 0.7 P-P ) Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, G = +1 V/V, VIN = (0.3V)/G, RL = 100 kΩ to VDD/2, CL = 60 pF, GSEL = VDD/2, and CS is tied low. Falling Edge 0.4 0.3 VDD = 1.8V 0.2 Rising Edge 0.1 0.0 -50 -25 0 25 50 75 Ambient Temperature (°C) FIGURE 2-25: with G = +1. 0.1 1.E+03 1k 1.E+04 10k 1.E+05 1.E+06 100k 1M Falling Edge Rising Edge 0.
MCP6G01/1R/1U/2/3/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, G = +1 V/V, VIN = (0.3V)/G, RL = 100 kΩ to VDD/2, CL = 60 pF, GSEL = VDD/2, and CS is tied low. 40 7 30 G = +50 6 Gain Peaking (dB) Gain (dB) 20 G = +10 10 0 G = +1 -10 -20 4 3 2 1 -30 0 100k 1M 1.E+05 1.E+06 Frequency (Hz) FIGURE 2-31: 10M 1.E+07 1 Normalized Input Voltage (100 mV/div) 1 Output Voltage (20 mV/div) 1 1 VOUT G = +50 G = +10 G = +1 1 0 0 GVIN 5.00 10.00 15.
MCP6G01/1R/1U/2/3/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, G = +1 V/V, VIN = (0.3V)/G, RL = 100 kΩ to VDD/2, CL = 60 pF, GSEL = VDD/2, and CS is tied low. 10 G = +50 G = +1 VOUT = 0.8VDD f = 1 kHz Measurement BW = 80 kHz 0.01 0.001 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Power Supply Voltage (V) FIGURE 2-37: Voltage. 5.0 THD plus Noise vs. Load 10 G = +10 0.1 G = +1 VDD = 5.0V f = 1 kHz 0.01 Measurement BW = 80 kHz Output Voltage (V) 1 4.0 GSEL VDD = 5.0V VIN = 0.
MCP6G01/1R/1U/2/3/4 Shutdown G=1 G = 10 G = 50 CS 1.8 0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 VOUT is "ON" Shutdown G=1 G = 10 G = 50 CS Time (20 µs/div) FIGURE 2-46: Output Voltage vs. Chip Select, with VDD = 5.0V. 1.8 GSEL Current (µA) FIGURE 2-45: GSEL Current, with GSEL Voltage of 0.3VDD. DS22004B-page 16 1228 Samples GSEL = 0.7VDD 7.0 VDD = 5.5V 6.6 VDD = 1.8V 6.2 20% 18% 16% 14% 12% 10% 8% 6% 4% 2% 0% 5.8 -3.0 -3.4 -3.8 -4.2 -4.6 -5.0 VDD = 1.8V -5.4 -5.
MCP6G01/1R/1U/2/3/4 Normalized GSEL Trip Point; VGSEL/VDD FIGURE 2-49: GSEL Trip Point between G = +1 and G = +10. © 2006 Microchip Technology Inc. 1228 Samples G = +1 to +50 0.773 0.768 0.764 0.759 VDD = 1.8V 0.755 0.750 0.745 VDD = 5.5V 0.741 0.259 0.255 0.250 0.245 0.241 VDD = 5.5V 0.236 0.231 0.227 0.222 VDD = 1.8V 100% 90% 80% 70% 60% 50% 40% 30% 20% 10% 0% 0.736 Percentage of Occurrences 1227 Samples G = +1 to +10 0.218 100% 90% 80% 70% 60% 50% 40% 30% 20% 10% 0% 0.
MCP6G01/1R/1U/2/3/4 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table 3-1 (single op amps) and Table 3-2 (dual and quad op amps).
MCP6G01/1R/1U/2/3/4 4.0 APPLICATIONS INFORMATION The MCP6G01/1R/1U/2/3/4 family of Selectable Gain Amplifiers (SGA) is based on simple analog building blocks (see Figure 4-1). Each of these blocks will be explained in more detail in the following subsections. VDD VIN VOUT 3 RG Gain Select Logic GSEL RF 5 MΩ Resistor Ladder (RLAD) Gain Switches TABLE 4-1: Gain (V/V) Gain (V/V) GSEL Voltage (Typ.) (V) 1 VDD/2 (or open) 10 0 50 VDD Note: VSS is assumed to be 0V FIGURE 4-1: 4.
MCP6G01/1R/1U/2/3/4 4.1.4 INPUT VOLTAGE AND CURRENT LIMITS The ESD protection on the inputs can be depicted as shown in Figure 4-2. This structure was chosen to protect the input transistors, and to minimize input bias current (IB). The input ESD diodes clamp the inputs when they try to go more than one diode drop below VSS.
MCP6G01/1R/1U/2/3/4 RLAD is intended to be driven at the VSS pin by a low impedance voltage source. The power supply driving the VSS pin should have an output impedance less than 0.1Ω to maintain reasonable gain accuracy. 4.3 TABLE 4-3: Selected Gain Figure 1-2 and Figure 2-43 show how the output voltage and supply current response to a CS pulse. 4.4 Gain Select (GSEL) The amplifier can be set to the gains +1 V/V, +10 V/V, and +50 V/V using one input pin (GSEL).
MCP6G01/1R/1U/2/3/4 4.6.3 Recommended RISO (:) 1,000 INPUT SOURCE IMPEDANCE The sources driving the inputs of the SGAs need to have reasonably low source impedance at higher frequencies. Figure 4-7 shows how the external source resistance (RS), SGA package pin capacitance (CP1), and SGA package pin-to-pin capacitance (CP2) form a positive feedback voltage divider network. Feedback may cause frequency response peaking and step response overshoot and ringing. 100 For all gains 10 10p 10 FIGURE 4-6: 4.
MCP6G01/1R/1U/2/3/4 4.7 Unused Amplifiers 4.8.2 An unused amplifier in a quad package (MCP6G04) should be configured as shown in Figure 4-8. This circuit prevents the output from toggling and causing crosstalk. Because the VIN pin looks like an open circuit, the GSEL voltage is automatically set at VDD/2, and the gain is 1 V/V. The output pin provides a buffered VDD/2 voltage and minimizes the supply current draw of the unused amplifier.
MCP6G01/1R/1U/2/3/4 4.8.4 4.8.5 SHIFTED GAIN RANGE SGA Figure 4-12 shows a circuit using a MCP6271 at a gain of +10 in front of a MCP6G01. This shifts the overall gain range to +10 V/V to +500 V/V (from +1 V/V to +50 V/V). VIN MCP6271 ADC DRIVER This family of SGAs is well suited for driving Analog-toDigital Converters (ADC). The gains (1, 10, and 50) effectively increase the ADC’s input resolution by a factor of as large as 50 (i.e., by 5.6 bits).
MCP6G01/1R/1U/2/3/4 5.0 PACKAGING INFORMATION 5.1 Package Marking Information 5-Lead SOT-23 (MCP6G01, MCP6G01R, MCP6G01U) Device XXNN Code MCP6G01 CKNN MCP6G01R CLNN MCP6G01U CMNN CK25 Note: Applies to 5-Lead SOT-23 8-Lead SOIC (150 mil) (MCP6G01, MCP6G02, MCP6G03) XXXXXXXX XXXXYYWW NNN 8-Lead MSOP (MCP6G01, MCP6G02, MCP6G03) XXXXXX YWWNNN Legend: XX...
MCP6G01/1R/1U/2/3/4 Package Marking Information (Continued) 14-Lead SOIC (150 mil) (MCP6S24) Example: MCP6G04 e3 E/SL^^ 0609256 XXXXXXXXXXX XXXXXXXXXXX YYWWNNN 14-Lead TSSOP (4.4mm) (MCP6S24) XXXXXXXX 0609 NNN 256 e3 * DS22004B-page 26 6G04E/ST YYWW Legend: XX...
MCP6G01/1R/1U/2/3/4 5-Lead Plastic Small Outline Transistor (OT) (SOT-23) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E E1 p B p1 n D 1 α c A φ L β A1 INCHES* Units Dimension Limits A2 MIN MILLIMETERS NOM MAX MIN NOM Pitch n p .038 0.95 Outside lead pitch (basic) p1 .075 1.90 Number of Pins Overall Height 5 MAX 5 A .035 .046 .057 0.90 1.18 1.
MCP6G01/1R/1U/2/3/4 8-Lead Plastic Micro Small Outline Package (MS) (MSOP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D N E E1 NOTE 1 1 2 e b A2 A ϕ c L1 A1 Number of Pins Pitch Overall Height Molded Package Standoff Overall Width Molded Package Overall Length Foot Length Footprint Foot Angle Lead Thickness Lead Width Units Dimension Limits N e A Thickness A2 A1 E Width E1 D L L1 ϕ c b MIN — 0.
MCP6G01/1R/1U/2/3/4 8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.
MCP6G01/1R/1U/2/3/4 14-Lead Plastic Small Outline (SL) – Narrow, 150 mil (SOIC) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E E1 p D 2 B n 1 α h 45° c A2 A φ L β Units Dimension Limits n p INCHES* NOM 14 .050 .061 .056 .007 .236 .154 .342 .015 .033 4 .009 .017 12 12 MAX MILLIMETERS NOM 14 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 5.99 3.81 3.90 8.56 8.69 0.25 0.38 0.41 0.84 0 4 0.20 0.23 0.36 0.
MCP6G01/1R/1U/2/3/4 14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E E1 p D 2 1 n B α A c φ β L Units Dimension Limits A1 A2 MILLIMETERS* INCHES MIN NOM MAX MIN NOM MAX Pitch n p Overall Height A .039 .041 .043 1.00 1.05 1.10 Molded Package Thickness A2 .033 .035 .037 0.85 0.90 0.95 Standoff A1 .002 .004 .006 0.
MCP6G01/1R/1U/2/3/4 NOTES: DS22004B-page 32 © 2006 Microchip Technology Inc.
MCP6G01/1R/1U/2/3/4 APPENDIX A: REVISION HISTORY Revision B (December 2006) The following is the list of modifications: • Added SOT-23-5 package option for the single gain blocks MCP6G01, MCP6G01R, and MCP6G01U. • Added a discussion on VIN range vs. G. Revision A (September 2006) • Original Release of this Document. © 2006 Microchip Technology Inc.
MCP6G01/1R/1U/2/3/4 NOTES: DS22004B-page 34 © 2006 Microchip Technology Inc.
MCP6G01/1R/1U/2/3/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO.
MCP6G01/1R/1U/2/3/4 NOTES: DS22004B-page 36 © 2006 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
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