Datasheet

© 2010-2012 Microchip Technology Inc. DS22257C-page 13
MCP6441/2/4
4.0 APPLICATION INFORMATION
The MCP6441/2/4 op amp is manufactured using
Microchip’s state-of-the-art CMOS process, specifically
designed for low power applications.
4.1 Rail-to-Rail Input
4.1.1 PHASE REVERSAL
The MCP6441/2/4 op amp is designed to prevent
phase reversal, when the input pins exceed the supply
voltages. Figure 2-29 shows the input voltage
exceeding the supply voltage with no phase reversal.
4.1.2 INPUT VOLTAGE LIMITS
In order to prevent damage and/or improper operation
of the amplifier, the circuit must limit the voltages at the
input pins (see Section 1.1, Absolute Maximum
Ratings †).
The Electrostatic Discharge (ESD) protection on the
inputs can be depicted as shown in Figure 4-1. This
structure was chosen to protect the input transistors
against many, but not all, over-voltage conditions, and
to minimize the input bias current (I
B
).
FIGURE 4-1: Simplified Analog Input ESD
Structures.
The input ESD diodes clamp the inputs when they try
to go more than one diode drop below V
SS
. They also
clamp any voltages that go well above V
DD
; their
breakdown voltage is high enough to allow normal
operation, but not low enough to protect against slow
over-voltage (beyond V
DD
) events. Very fast ESD
events that meet the spec are limited so that damage
does not occur.
In some applications, it may be necessary to prevent
excessive voltages from reaching the op amp inputs;
Figure 4-2 shows one approach to protecting these
inputs.
FIGURE 4-2: Protecting the Analog
Inputs.
A significant amount of current can flow out of the
inputs when the Common Mode voltage (V
CM
) is below
ground (V
SS
); see Figure 2-31.
4.1.3 INPUT CURRENT LIMITS
In order to prevent damage and/or improper operation
of the amplifier, the circuit must limit the currents into
the input pins (see Section 1.1 “Absolute Maximum
Ratings †”).
Figure 4-3 shows one approach to protecting these
inputs. The resistors R
1
and R
2
limit the possible
currents in or out of the input pins (and the ESD diodes,
D
1
and D
2
). The diode currents will go through either
V
DD
or V
SS
.
FIGURE 4-3: Protecting the Analog
Inputs.
Bond
Pad
Bond
Pad
Bond
Pad
V
DD
V
IN
+
V
SS
Input
Stage
Bond
Pad
V
IN
–
V
1
V
DD
D
1
V
2
D
2
MCP644X
V
OUT
V
1
R
1
V
DD
D
1
min(R
1
,R
2
)>
V
SS
–min(V
1
, V
2
)
2mA
V
2
R
2
D
2
MCP644X
V
OUT
min(R
1
,R
2
)>
max(V
1
,V
2
)–V
DD
2mA