Datasheet
MCP631/2/3/4/5/9
DS22197B-page 24 2009-2011 Microchip Technology Inc.
C
N
and R
N
form a low-pass filter that affects the signal
at V
P
. This filter has a single real pole at 1/(2R
N
C
N
).
The largest value of R
F
that should be used depends
on noise gain (see G
N
in Section 4.3.1 “Capacitive
Loads”), C
G
and the open-loop gain’s phase shift.
Figure 4-9 shows the maximum recommended R
F
for
several C
G
values. Some applications may modify
these values to reduce either output loading or gain
peaking (step response overshoot).
FIGURE 4-9: Maximum Recommended
R
F
vs. Gain.
Figure 2-34 and Figure 2-35 show the small signal and
large signal step responses at G = +1 V/V. The unity
gain buffer usually has R
F
=0 and R
G
open.
Figure 2-36 and Figure 2-37 show the small signal and
large signal step responses at G = -1 V/V. Since the
noise gain is 2 V/V and C
G
10 pF, the resistors were
chosen to be R
F
=R
G
=1k and R
N
= 500.
It is also possible to add a capacitor (C
F
) in parallel with
R
F
to compensate for the de-stabilizing effect of C
G
.
This makes it possible to use larger values of R
F
. The
conditions for stability are summarized in Equation 4-6.
EQUATION 4-6:
4.4 MCP631, MCP633, MCP635, and
MCP639 Chip Select
The MCP633 is a single amplifier with Chip Select
(CS
). When CS is pulled high, the supply current drops
to 1 µA (typical) and flows through the CS
pin to V
SS
.
When this happens, the amplifier output is put into a
high-impedance state. By pulling CS low, the amplifier
is enabled. The CS
pin has an internal 5 M (typical)
pull-down resistor connected to V
SS
, so it will go low if
the CS
pin is left floating. Figure 1-1, Figure 2-42 and
Figure 2-43 show the output voltage and supply current
response to a CS
pulse.
The MCP635 is a dual amplifier with two CS
pins; CSA
controls op amp A and CSB controls op amp B. These
op amps are controlled independently, with an enabled
quiescent current (I
Q
) of 2.5 mA/amplifier (typical) and
a disabled I
Q
of 1 µA/amplifier (typical). The I
Q
seen at
the supply pins is the sum of the two op amps’ I
Q
; the
typical value for the MCP635’s I
Q
will be 2 µA, 2.5 mA
or 5 mA when there are 0, 1 or 2 amplifiers enabled,
respectively.
The MCP639 is a quad amplifier with two CS
pins; CSB
controls op amp B and CSD control s op amp D.
4.5 Power Supply
With this family of operational amplifiers, the power
supply pin (V
DD
for single supply) should have a local
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high frequency performance. Surface mount,
multilayer ceramic capacitors, or their equivalent,
should be used.
These op amps require a bulk capacitor (i.e., 2.2 µF or
larger) within 50 mm to provide large, slow currents.
Tantalum capacitors, or their equivalent, may be a good
choice. This bulk capacitor can be shared with other
nearby analog parts as long as crosstalk through the
supplies does not prove to be a problem.
4.6 High Speed PCB Layout
These op amps are fast enough that a little extra care
in the PCB (Printed Circuit Board) layout can make a
significant difference in performance. Good PC board
layout techniques will help you achieve the
performance shown in the specifications and Typical
Performance Curves; it will also help you minimize
EMC (Electro-Magnetic Compatibility) issues.
Use a solid ground plane. Connect the bypass local
capacitor(s) to this plane with minimal length traces.
This cuts down inductive and capacitive crosstalk.
Separate digital from analog, low speed from high
speed, and low power from high power. This will reduce
interference.
1.E+02
1.E+03
1.E+04
1.E+05
1 10 100
Noise Gain; G
N
(V/V)
Maximum Recommended R
F
(Ω)
G
N
> +1 V/V
100
10k
100k
1k
C
G
= 10 pF
C
G
= 32 pF
C
G
= 100 pF
C
G
= 320 pF
C
G
= 1 nF
f
F
f
GBWP
2G
N2
, G
N1
G
N2
We need:
G
N1
1R
F
R
G
+=
G
N2
1C
G
C
F
+=
f
F
12
R
F
C
F
=
f
Z
f
F
G
N1
G
N2
=
Given:
f
F
f
GBWP
4G
N1
, G
N1
G
N2