Datasheet

 2009-2011 Microchip Technology Inc. DS22197B-page 21
MCP631/2/3/4/5/9
4.0 APPLICATIONS
The MCP631/2/3/4/5/9 family op amps is manufactured
using the Microchip state-of-the-art CMOS process. It
is designed for low cost, low power and high speed
applications. Its low supply voltage, low quiescent
current and wide bandwidth make the MCP631/2/3/4/5/
9 ideal for battery-powered applications.
4.1 Input
4.1.1 PHASE REVERSAL
The input devices are designed to not exhibit phase
inversion when the input pins exceed the supply
voltages. Figure 2-38 shows an input voltage
exceeding both supplies with no phase inversion.
4.1.2 INPUT VOLTAGE AND CURRENT
LIMITS
The electrostatic discharge (ESD) protection on the
inputs can be depicted as shown in Figure 4-1. This
structure was chosen to protect the input transistors,
and to minimize input bias current (I
B
). The input ESD
diodes clamp the inputs when they try to go more than
one diode drop below V
SS
. They also clamp any volt-
ages that go too far above V
DD
; their breakdown volt-
age is high enough to allow normal operation, and low
enough to bypass quick ESD events within the speci-
fied limits.
FIGURE 4-1: Simplified Analog Input ESD
Structures.
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the currents
(and voltages) at the input pins (see Section 1.1
“Absolute Maximum Ratings †”). Figure 4-2 shows
the recommended approach to protecting these inputs.
The internal ESD diodes prevent the input pins
(V
IN
+and V
IN
-) from going too far below ground, and
the resistors R
1
and R
2
limit the possible current drawn
out of the input pins. Diodes D
1
and D
2
prevent the
input pins (V
IN
+ and V
IN
-) from going too far above
V
DD
, and dump any currents onto V
DD
. When
implemented as shown, resistors R
1
and R
2
also limit
the current through D
1
and D
2
.
FIGURE 4-2: Protecting the Analog
Inputs.
It is also possible to connect the diodes to the left of the
resistor R
1
and R
2
. In this case, the currents through
the diodes D
1
and D
2
need to be limited by some other
mechanism. The resistors then serve as in-rush
current limiters; the DC current into the input pins
(V
IN
+ and V
IN
-) should be very small.
A significant amount of current can flow out of the
inputs (through the ESD diodes) when the common
mode voltage (V
CM
) is below ground (V
SS
); see
Figure 2-13. Applications that are high-impedance may
need to limit the usable voltage range.
4.1.3 NORMAL OPERATION
The input stage of the MCP631/2/3/4/5/9 op amps uses
a differential PMOS input stage. It operates at
low common mode input voltages (V
CM
), with V
CM
between V
SS
– 0.3V and V
DD
– 1.3V. To ensure proper
operation, the input offset voltage (V
OS
) is measured
at both V
CM
=V
SS
– 0.3V and V
DD
–1.3V.
See Figure 2-5 and Figure 2-6 for temperature effects.
When operating at very low non-inverting gains, the
output voltage is limited at the top by the V
CM
range
(< V
DD
– 1.3V); see Figure 4-3.
FIGURE 4-3: Unity Gain Voltage
Limitations for Linear Operation.
Bond
Pad
Bond
Pad
Bond
Pad
V
DD
V
IN
+
V
SS
Input
Stage
Bond
Pad
V
IN
-
V
1
R
1
V
DD
D
1
R
1
>
V
SS
– (minimum expected V
1
)
2mA
V
OUT
R
2
>
V
SS
– (minimum expected V
2
)
2mA
V
2
R
2
D
2
MCP63X
V
IN
V
DD
V
OUT
V
SS
V 
IN
V 
OUT
V
DD
1.3V– 
MCP63X