Datasheet

 2009-2011 Microchip Technology Inc. DS22197B-page 5
MCP631/2/3/4/5/9
1.3 Timing Diagram
FIGURE 1-1: Timing Diagram.
1.4 Test Circuits
The circuit used for most DC and AC tests is shown in
Figure 1-2. It independently sets V
CM
and V
OUT
; see
Equation 1-1. The circuit’s common mode voltage is
(V
P
+V
M
)/2, not V
CM
. V
OST
includes V
OS
plus the
effects of temperature, CMRR, PSRR and A
OL
.
EQUATION 1-1:
TABLE 1-4: TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, all limits are specified for: V
DD
= +2.5V to +5.5V, V
SS
= GND.
Parameters Sym Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range T
A
-40 — +125 °C
Operating Temperature Range T
A
-40 — +125 °C (Note 1)
Storage Temperature Range T
A
-65 — +150 °C
Thermal Package Resistances
Thermal Resistance, 5L-SOT-23 θ
JA
— 220.7 — °C/W
Thermal Resistance, 6L-SOT-23 θ
JA
— 190.5 — °C/W
Thermal Resistance, 8L-2x3 TDFN θ
JA
— 52.5 — °C/W
Thermal Resistance, 8L-3x3 DFN 
JA
—60—°C/W(Note 2)
Thermal Resistance, 8L-SOIC 
JA
— 149.5 — °C/W
Thermal Resistance, 10L-3x3 DFN 
JA
—57—°C/W(Note 2)
Thermal Resistance, 10L-MSOP 
JA
— 202 — °C/W
Thermal Resistance, 14L-SOIC θ
JA
— 95.3 — °C/W
Thermal Resistance, 14L-TSSOP θ
JA
— 100 — °C/W
Thermal Resistance, 16L-4x4-QFN θ
JA
— 45.7 — °C/W (Note 2)
Note 1: Operation must not cause T
J
to exceed Maximum Junction Temperature specification (+150°C).
2: Measured on a standard JC51-7, four layer printed circuit board with ground plane and vias.
V
OUT
I
SS
I
CS
-1 µA
High-Z
0.7 µA
On
-2.5 mA
-1 µA
t
ON
t
OFF
High-Z
0.1 nA
0.7 µA
CS
V
IL
V
IH
(typical)
(typical)
(typical)
(typical)
(typical) (typical)
G
DM
R
F
R
G
 =
V
CM
V
P
11G
N
–V
REF
1 G
N
+=
V
OUT
V
REF
V
P
V
M
–G
DM
V
OST
G
N
++=
Where:
G
DM
= Differential Mode Gain (V/V)
G
N
= Noise Gain (V/V)
V
CM
= Op Amp’s Common Mode
Input Voltage
(V)
V
OST
= Op Amp’s Total Input Offset
Voltage
(mV)
V
OST
V
IN–
V
IN+
–=
G
N
1 G
DM
+=