MCP6281/1R/2/3/4/5 450 µA, 5 MHz Rail-to-Rail Op Amp Features Description • • • • • • • • The Microchip Technology Inc. MCP6281/1R/2/3/4/5 family of operational amplifiers (op amps) provide wide bandwidth for the current. This family has a 5 MHz Gain Bandwidth Product (GBWP) and a 65° phase margin. This family also operates from a single supply voltage as low as 2.2V, while drawing 450 µA (typical) quiescent current.
MCP6281/1R/2/3/4/5 1.0 ELECTRICAL CHARACTERISTICS VDD – VSS ........................................................................7.0V † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied.
MCP6281/1R/2/3/4/5 AC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +5.5V, VSS = GND, VOUT ≈ VDD/2, VCM = VDD/2, VL = VDD/2, RL = 10 kΩ to VL, CL = 60 pF and CS is tied low. (refer to Figure 1-2 and Figure 1-3). Parameters Sym Min Typ Max Units MHz Conditions AC Response Gain Bandwidth Product GBWP — 5.0 — Phase Margin at Unity-Gain PM — 65 — ° Slew Rate SR — 2.5 — V/µs Input Noise Voltage Eni — 5.
MCP6281/1R/2/3/4/5 TEMPERATURE SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, VDD = +2.2V to +5.5V and VSS = GND.
MCP6281/1R/2/3/4/5 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
MCP6281/1R/2/3/4/5 TYPICAL PERFORMANCE CURVES (CONTINUED) Note: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, RL = 10 kΩ to VL, CL = 60 pF and CS is tied low. 10,000 VCM = VSS Representative Part 250 Input Bias, Offset Currents (pA) Input Offset Voltage (µV) 300 200 150 100 50 0 VDD = 5.5V VDD = 2.2V -50 -100 VCM = VDD VDD = 5.5V 1,000 Input Bias Current 100 Input Offset Current 10 1 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.
MCP6281/1R/2/3/4/5 TYPICAL PERFORMANCE CURVES (CONTINUED) Note: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, RL = 10 kΩ to VL, CL = 60 pF and CS is tied low. 500 400 300 TA = +125°C TA = +85°C TA = +25°C TA = -40°C 100 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 1000 100 10 VOL - VSS VDD - VOH 1 0.01 0.1 Power Supply Voltage (V) 0 100 -30 -90 Phase 0 -180 90 VDD = 5.5V 5 85 VDD = 2.
MCP6281/1R/2/3/4/5 TYPICAL PERFORMANCE CURVES (CONTINUED) Note: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, RL = 10 kΩ to VL, CL = 60 pF and CS is tied low. 30 Input Noise Voltage Density (nV/√Hz) Input Noise Voltage Density (nV/√Hz) 1,000 100 10 1.E-01 1.E+00 0.1 1 1.E+01 1.E+02 10 100 1.E+03 1.E+04 1k 10k 1.E+05 1.E+06 100k f = 1 kHz VDD = 5.0V 25 20 15 10 5 0 0.0 1M 0.5 Frequency (Hz) FIGURE 2-19: vs.
MCP6281/1R/2/3/4/5 TYPICAL PERFORMANCE CURVES (CONTINUED) Note: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, RL = 10 kΩ to VL, CL = 60 pF and CS is tied low. 5.0 5.0 G = +1V/V VDD = 5.0V 4.5 Output Voltage (V) Output Voltage (V) 3.5 3.0 2.5 2.0 1.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 1.0 0.5 0.5 0.0 G = -1V/V VDD = 5.0V 4.5 4.0 0.E+00 2.E-06 4.E-06 6.E-06 8.E-06 1.E-05 1.E-05 1.E-05 2.E-05 2.E-05 0.0 2.E-05 0.E+00 2.
MCP6281/1R/2/3/4/5 Note: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, RL = 10 kΩ to VL, CL = 60 pF and CS is tied low. 6 +125°C +85°C +25°C -40°C -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 Input Voltage (V) FIGURE 2-31: Measured Input Current vs. Input Voltage (below VSS). DS21811E-page 10 Input, Output Voltage (V) Input Current Magnitude (A) 1.E-02 10m 1.E-03 1m 1.E-04 100µ 1.E-05 10µ 1.E-06 1µ 100n 1.E-07 10n 1.E-08 1n 1.
MCP6281/1R/2/3/4/5 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table 3-1 (single op amps) and Table 3-2 (dual and quad op amps).
MCP6281/1R/2/3/4/5 4.0 APPLICATION INFORMATION The MCP6281/1R/2/3/4/5 family of op amps is manufactured using Microchip's state-of-the-art CMOS process. This family is specifically designed for lowcost, low-power and general purpose applications. The low supply voltage, low quiescent current and wide bandwidth makes the MCP6281/1R/2/3/4/5 ideal for battery-powered applications. VDD, and dump any currents onto VDD. When implemented as shown, resistors R1 and R2 also limit the current through D1 and D2.
MCP6281/1R/2/3/4/5 4.2 Rail-to-Rail Output The output voltage range of the MCP6281/1R/2/3/4/5 op amp is VDD – 15 mV (min.) and VSS + 15 mV (max.) when RL = 10 kΩ is connected to VDD/2 and VDD = 5.5V. Refer to Figure 2-16 for more information. After selecting RISO for your circuit, double-check the resulting frequency response peaking and step response overshoot. Modify RISO's value until the response is reasonable.
MCP6281/1R/2/3/4/5 4.6 Supply Bypass VIN– With this family of operational amplifiers, the power supply pin (VDD for single-supply) should have a local bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm for good, high-frequency performance. It also needs a bulk capacitor (i.e., 1 µF or larger) within 100 mm to provide large, slow currents. This bulk capacitor can be shared with nearby analog parts. 4.7 Unused Op Amps VDD VDD VREF R2 FIGURE 4-7: for Inverting Gain. 1.
MCP6281/1R/2/3/4/5 4.9 Application Circuits 4.9.1 4.9.3 SALLEN-KEY HIGH-PASS FILTER The MCP6281/1R/2/3/4/5 op amps can be used in active-filter applications. Figure 4-8 shows a secondorder Sallen-Key high-pass filter with a gain of 1. The output bias voltage is set by the VDD/2 reference, which can be changed to any voltage within the output voltage range. R1 VIN CASCADED OP AMP APPLICATIONS The MCP6285 provides the flexibility of Low-power mode for dual op amps in an 8-pin package.
MCP6281/1R/2/3/4/5 R4 R3 R2 R2 R1 C2 RF B A VIN VOUT 4.9.3.3 FIGURE 4-13: Buffered Non-inverting Integrator with Chip Select. Cascaded Gain Circuit 4.9.3.5 Difference Amplifier R4 R2 CS R 1 C 1 = ( R 2 || R F )C 2 Figure 4-12 shows op amp A configured as a difference amplifier with Chip Select. In this configuration, it is recommended to use well-matched resistors (e.g., 0.1%) to increase the Common Mode Rejection Ratio (CMRR).
MCP6281/1R/2/3/4/5 4.9.3.8 R6 R1 C1 R3 C3 R7 R2 VIN R5 C2 B A VOUT MCP6285 R4 CS FIGURE 4-15: Second-Order Multiple Feedback Low-Pass Filter with an Extra Pole-Zero Pair. 4.9.3.7 Capacitorless Second-Order Low-Pass filter with Chip Select Second-Order Sallen-Key Low-Pass Filter with an Extra Pole-Zero Pair Figure 4-16 is a second-order Sallen-Key low-pass filter with Chip Select.
MCP6281/1R/2/3/4/5 5.0 DESIGN AIDS Microchip provides the basic design tools needed for the MCP6281/1R/2/3/4/5 family of op amps. 5.1 SPICE Macro Model The latest SPICE macro model for the MCP6281/1R/2/ 3/4/5 op amps is available on the Microchip web site at www.microchip.com. This model is intended to be an initial design tool that works well in the op amp’s linear region of operation over the temperature range. See the model file for information on its capabilities.
MCP6281/1R/2/3/4/5 6.0 PACKAGING INFORMATION 6.1 Package Marking Information Example: 5-Lead SOT-23 (MCP6281 and MCP6281R) Device XXNN Code MCP6281 CHNN MCP6281R EUNN CH25 Note: Applies to 5-Lead SOT-23. Example: 6-Lead SOT-23 (MCP6283) XXNN CL25 8-Lead MSOP Example: XXXXXX 6281E YWWNNN 722256 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW MCP6281 E/P256 0722 Legend: XX...
MCP6281/1R/2/3/4/5 Package Marking Information (Continued) 8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW NNN Example: MCP6281 E/SN0722 256 14-Lead PDIP (300 mil) (MCP6284) MCP6281E SN e3 0722 256 OR Example: XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN MCP6284-E/P 0722256 MCP6284 E/P e3 0722256 OR 14-Lead SOIC (150 mil) (MCP6284) Example: XXXXXXXXXX XXXXXXXXXX YYWWNNN MCP6284ESL 0722256 MCP6284 e3 E/SL^^ 0722256 OR 14-Lead TSSOP (MCP6284) XXXXXX YYWW NNN DS21811E-page 20 Example: 6284EST 0437 256 ©
MCP6281/1R/2/3/4/5 5-Lead Plastic Small Outline Transistor (OT) [SOT-23] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging b N E E1 3 2 1 e e1 D A2 A c φ A1 L L1 Units Dimension Limits Number of Pins MILLIMETERS MIN NOM MAX N 5 Lead Pitch e 0.95 BSC Outside Lead Pitch e1 Overall Height A 0.90 – Molded Package Thickness A2 0.89 – 1.30 Standoff A1 0.00 – 0.15 Overall Width E 2.
MCP6281/1R/2/3/4/5 6-Lead Plastic Small Outline Transistor (CH) [SOT-23] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging b 4 N E E1 PIN 1 ID BY LASER MARK 1 2 3 e e1 D A A2 c φ L A1 L1 Units Dimension Limits Number of Pins MILLIMETERS MIN N NOM MAX 6 Pitch e 0.95 BSC Outside Lead Pitch e1 1.90 BSC Overall Height A 0.90 – Molded Package Thickness A2 0.89 – 1.45 1.30 Standoff A1 0.
MCP6281/1R/2/3/4/5 8-Lead Plastic Micro Small Outline Package (MS) [MSOP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D N E E1 NOTE 1 1 2 e b A2 A c φ L L1 A1 Units Dimension Limits Number of Pins MILLIMETERS MIN N NOM MAX 8 Pitch e Overall Height A – 0.65 BSC – Molded Package Thickness A2 0.75 0.85 0.95 Standoff A1 0.00 – 0.15 Overall Width E Molded Package Width E1 3.
MCP6281/1R/2/3/4/5 8-Lead Plastic Dual In-Line (P) – 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging N NOTE 1 E1 1 3 2 D E A2 A L A1 c e eB b1 b Units Dimension Limits Number of Pins INCHES MIN N NOM MAX 8 Pitch e Top to Seating Plane A – – .210 Molded Package Thickness A2 .115 .130 .195 Base to Seating Plane A1 .015 – – Shoulder to Shoulder Width E .290 .
MCP6281/1R/2/3/4/5 14-Lead Plastic Dual In-Line (P) – 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging N NOTE 1 E1 1 3 2 D E A2 A L A1 c b1 b e eB Units Dimension Limits Number of Pins INCHES MIN N NOM MAX 14 Pitch e Top to Seating Plane A – – .210 Molded Package Thickness A2 .115 .130 .195 Base to Seating Plane A1 .015 – – Shoulder to Shoulder Width E .
MCP6281/1R/2/3/4/5 8-Lead Plastic Small Outline (SN) – Narrow, 3.90 mm Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D e N E E1 NOTE 1 1 2 3 α h b h A2 A c φ L A1 L1 Units Dimension Limits Number of Pins β MILLIMETERS MIN N NOM MAX 8 Pitch e Overall Height A – 1.27 BSC – Molded Package Thickness A2 1.25 – – Standoff § A1 0.10 – 0.
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MCP6281/1R/2/3/4/5 14-Lead Plastic Small Outline (SL) – Narrow, 3.90 mm Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D N E E1 NOTE 1 1 2 3 e h b A A2 c φ L A1 β L1 Units Dimension Limits Number of Pins α h MILLIMETERS MIN N NOM MAX 14 Pitch e Overall Height A – 1.27 BSC – Molded Package Thickness A2 1.25 – – Standoff § A1 0.10 – 0.
MCP6281/1R/2/3/4/5 14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm Body [TSSOP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D N E E1 NOTE 1 1 2 e b A2 A c A1 φ Units Dimension Limits Number of Pins L L1 MILLIMETERS MIN N NOM MAX 14 Pitch e Overall Height A – 0.65 BSC – Molded Package Thickness A2 0.80 1.00 1.05 Standoff A1 0.05 – 0.15 1.
MCP6281/1R/2/3/4/5 NOTES: DS21811E-page 30 © 2008 Microchip Technology Inc.
MCP6281/1R/2/3/4/5 APPENDIX A: REVISION HISTORY Revision E (February 2008) The following is the list of modifications: 1. 2. 3. 4. 5. 6. 7. 8. 9. Updated notes to Section 1.0 “Electrical Characteristics”. Increased absolute maximum voltage range of input pins. Increased maximum operating supply voltage (VDD). Added Section 1.1 “Test Circuits”. Added Figure 2-32. Updated Table 3-1 and Table 3-2 in Section 3.0 “Pin Descriptions”. Added Section 4.1.1 “Phase Reversal”, Section 4.1.
MCP6281/1R/2/3/4/5 NOTES: DS21811E-page 32 © 2008 Microchip Technology Inc.
MCP6281/1R/2/3/4/5 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO.
MCP6281/1R/2/3/4/5 NOTES: DS21811E-page 34 © 2008 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
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