Datasheet
Table Of Contents
- 1.0 Electrical Characteristics
- 2.0 Typical Performance Curves
- FIGURE 2-1: Input Offset Voltage.
- FIGURE 2-2: Input Bias Current at TA = +85˚C.
- FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage, with VDD = 2.0V.
- FIGURE 2-4: Input Offset Voltage Drift.
- FIGURE 2-5: Input Bias Current at TA = +125˚C.
- FIGURE 2-6: Input Offset Voltage vs. Common Mode Input Voltage, with VDD = 5.5V.
- FIGURE 2-7: Common Mode Input Voltage Range Lower Limit vs. Temperature.
- FIGURE 2-8: Input Offset Voltage vs. Output Voltage.
- FIGURE 2-9: CMRR, PSRR vs. Frequency.
- FIGURE 2-10: Common Mode Input Voltage Range Upper Limit vs. Temperature.
- FIGURE 2-11: Input Bias, Input Offset Currents vs. Temperature.
- FIGURE 2-12: CMRR, PSRR vs. Temperature.
- FIGURE 2-13: Input Bias, Offset Currents vs. Common Mode Input Voltage, with TA = +85˚C.
- FIGURE 2-14: Quiescent Current vs. Supply Voltage.
- FIGURE 2-15: Open-Loop Gain, Phase vs. Frequency.
- FIGURE 2-16: Input Bias, Offset Currents vs. Common Mode Input Voltage, with TA = +125˚C.
- FIGURE 2-17: Output Voltage Headroom vs. Output Current Magnitude.
- FIGURE 2-18: Gain Bandwidth Product, Phase Margin vs. Temperature.
- FIGURE 2-19: Maximum Output Voltage Swing vs. Frequency.
- FIGURE 2-20: Input Noise Voltage Density vs. Frequency.
- FIGURE 2-21: Output Short Circuit Current vs. Supply Voltage.
- FIGURE 2-22: Slew Rate vs. Temperature.
- FIGURE 2-23: Input Noise Voltage Density vs. Common Mode Input Voltage, with f = 1 kHz.
- FIGURE 2-24: Channel-to-Channel Separation vs. Frequency (MCP6272 and MCP6274).
- FIGURE 2-25: Quiescent Current vs. Chip Select (CS) Voltage, with VDD = 2.0V (MCP6273 and MCP6275 only).
- FIGURE 2-26: Large Signal Non-inverting Pulse Response.
- FIGURE 2-27: Small Signal Non-inverting Pulse Response.
- FIGURE 2-28: Quiescent Current vs. Chip Select (CS) Voltage, with VDD = 5.5V (MCP6273 and MCP6275 only).
- FIGURE 2-29: Large Signal Inverting Pulse Response.
- FIGURE 2-30: Small Signal Inverting Pulse Response.
- FIGURE 2-31: Chip Select (CS) to Amplifier Output Response Time, with VDD = 2.0V (MCP6273 and MCP6275 only).
- FIGURE 2-32: Input Current vs. Input Voltage.
- FIGURE 2-33: Chip Select (CS) to Amplifier Output Response Time, with VDD = 5,5V (MCP6273 and MCP6275 only).
- FIGURE 2-34: The MCP6271/1R/2/3/4/5 Show no Phase Reversal.
- 3.0 Pin Descriptions
- 4.0 Application Information
- 4.1 Rail-to-Rail Inputs
- 4.2 Rail-to-Rail Output
- 4.3 Capacitive Loads
- 4.4 MCP6273/5 Chip Select
- 4.5 Cascaded Dual Op Amps (MCP6275)
- 4.6 Unused Amplifiers
- 4.7 Supply Bypass
- 4.8 PCB Surface Leakage
- 4.9 Application Circuits
- FIGURE 4-8: Active Full-wave Rectifier.
- FIGURE 4-9: Non-Inverting Integrator.
- FIGURE 4-10: Isolating the Load with a Buffer.
- FIGURE 4-11: Cascaded Gain Circuit Configuration.
- FIGURE 4-12: Difference Amplifier Circuit.
- FIGURE 4-13: Integrator Circuit with Active Compensation.
- FIGURE 4-14: Second Order Multiple Feedback Low-Pass Filter with an Extra Pole- Zero Pair.
- FIGURE 4-15: Second Order Sallen-Key Low-Pass Filter with an Extra Pole-Zero Pair and Chip Select.
- FIGURE 4-16: Capacitorless Second Order Low-Pass Filter with Chip Select.
- 5.0 Design Tools
- 6.0 Packaging Information
MCP6271/1R/2/3/4/5
DS21810F-page 16 © 2008 Microchip Technology Inc.
4.9 Application Circuits
4.9.1 ACTIVE FULL-WAVE RECTIFIER
The MCP6271/1R/2/3/4/5 family of amplifiers can be
used in applications such as an Active Full-Wave
Rectifier or an Absolute Value circuit, as shown in
Figure 4-8. The amplifier and feedback loops in this
active voltage rectifier circuit eliminate the diode drop
problem that exists in a passive voltage rectifier. This
circuit behaves as a follower (the output follows the
input) as long as the input signal is more positive than
the reference voltage. If the input signal is more
negative than the reference voltage, however, the
circuit behaves as an inverting amplifier. Therefore, the
output voltage will always be above the reference
voltage, regardless of the input signal.
FIGURE 4-8: Active Full-wave Rectifier.
The design equations give a gain of ±1 from V
IN
to
V
OUT
, and produce rail-to-rail outputs.
4.9.2 LOSSY NON-INVERTING
INTEGRATOR
The non-inverting integrator shown in Figure 4-9 is
easy to build. It saves one op amp over the typical
Miller integrator plus inverting amplifier configuration.
The phase accuracy of this integrator depends on the
matching of the input and feedback resistor-capacitor
time constants. R
F
makes this a lossy integrator (it has
finite gain at DC), and makes this integrator stable by
itself.
FIGURE 4-9: Non-Inverting Integrator.
–
+
–
+
V
IN
V
OUT
V
REF
V
REF
R
1
R
3
R
4
R
5
R
2
Op Amp A
Op Amp B
D
1
D
2
V
REF
V
REF
time time
Input
Output
R
5
R
2
R
4
2R
3
------------=
R
1
R
2
R
3
==
1/2
MCP6272
1/2
MCP6272
R
4
R
3
<1
V
D1
V
REF
V
SS
–
----------------------------
–
⎝⎠
⎛⎞
+
_
C
1
C
2
R
1
R
2
V
IN
V
OUT
R
F
V
OUT
V
IN
-------------
1
sR
1
C
1
()
--------------------
f
1
2πR
1
C
1
1 R
F
R
2
⁄+()
---------------------------------------------------
≈,≈
MCP6271
R
F
R
2
≈
R
1
C
1
R
2
||R
F
()C
2
=
C
2