MCP6231/1R/1U/2/4 20 µA, 300 kHz Rail-to-Rail Op Amp Features Description • • • • • • The Microchip Technology Inc. MCP6231/1R/1U/2/4 operational amplifiers (op amps) provide wide bandwidth for the quiescent current. The MCP6231/1R/ 1U/2/4 family has a 300 kHz gain bandwidth product and 65°C (typical) phase margin. This family operates from a single supply voltage as low as 1.8V, while drawing 20 µA (typical) quiescent current.
MCP6231/1R/1U/2/4 NOTES: DS21881E-page 2 © 2009 Microchip Technology Inc.
MCP6231/1R/1U/2/4 1.0 ELECTRICAL CHARACTERISTICS VDD – VSS ........................................................................7.0V † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied.
MCP6231/1R/1U/2/4 AC ELECTRICAL CHARACTERISTICS Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8 to 5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, RL = 100 kΩ to VDD/2 and CL = 60 pF. Parameters Sym Min Typ Max Units Conditions GBWP — 300 — kHz Phase Margin PM — 65 — ° Slew Rate SR — 0.15 — V/µs Input Noise Voltage Eni — 6.0 — µVP-P Input Noise Voltage Density eni — 52 — nV/√Hz f = 1 kHz Input Noise Current Density ini — 0.
MCP6231/1R/1U/2/4 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
MCP6231/1R/1U/2/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, RL = 100 kΩ to VDD/2 and CL = 60 pF. FIGURE 2-7: vs. Frequency. VDD = 1.8V TA = -40°C TA = +25°C TA = +85°C TA = +125°C 450 350 250 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 -0.4 150 FIGURE 2-10: 50 0 -50 -100 -150 Common Mode Input Voltage (V) FIGURE 2-9: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 5.5V. 6.0 5.5 5.0 4.5 4.0 3.
MCP6231/1R/1U/2/4 Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2, RL = 100 kΩ to VDD/2 and CL = 60 pF. VDD = 5.5V 0.25 Falling Edge 0.20 0.15 0.10 Rising Edge VDD = 1.8V 0.05 -50 -25 0 25 50 75 100 Ambient Temperature (°C) FIGURE 2-13: Temperature. 125 Slew Rate vs. Ambient Time (2 µs/div) FIGURE 2-16: Pulse Response. 1,000 VDD = 5.0V G = +1 V/V 4.5 100 VDD – VOH VOL – VSS 10 1 10µ 1.E-02 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.
MCP6231/1R/1U/2/4 6.0 +125°C +85°C +25°C -40°C -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 Input Voltage (V) FIGURE 2-19: Measured Input Current vs. Input Voltage (below VSS). DS21881E-page 8 Input, Output Voltages (V) Input Current Magnitude (A) 1.E-02 10m 1.E-03 1m 1.E-04 100µ 1.E-05 10µ 1.E-06 1µ 100n 1.E-07 10n 1.E-08 1n 1.E-09 100p 1.E-10 10p 1.E-11 1p 1.E-12 VOUT 5.0 4.0 VDD = 5.0V G = +2 V/V VIN 3.0 2.0 1.0 0.0 -1.
MCP6231/1R/1U/2/4 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table 3-1 (single op amps) and Table 3-2 (dual and quad op amps).
MCP6231/1R/1U/2/4 NOTES: DS21881E-page 10 © 2009 Microchip Technology Inc.
MCP6231/1R/1U/2/4 4.0 APPLICATION INFORMATION The MCP6231/1R/1U/2/4 family of op amps is manufactured using Microchip’s state-of-the-art CMOS process and is specifically designed for low-cost, low-power and general-purpose applications. The low supply voltage, low quiescent current and wide bandwidth makes the MCP6231/1R/1U/2/4 ideal for battery-powered applications. 4.1 VIN+ Bond Pad Rail-to-Rail Inputs 4.1.1 PHASE REVERSAL 6.0 VOUT 5.0 4.
MCP6231/1R/1U/2/4 4.1.3 1k 1,000 NORMAL OPERATION The input stage of the MCP6231/1R/1U/2/4 op amps use two differential CMOS input stages in parallel. One operates at low common mode input voltage (VCM), while the other operates at high VCM. WIth this topology, the device operates with VCM up to 0.3V above VDD and 0.3V below VSS. 4.2 Capacitive Loads Driving large capacitive loads can cause stability problems for voltage feedback op amps.
MCP6231/1R/1U/2/4 4.6 PCB Surface Leakage 4.7 In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 1012Ω. A 5V difference would cause 5 pA of current to flow, which is greater than the MCP6231/1R/1U/2/4 family’s bias current at +25°C (1 pA, typical).
MCP6231/1R/1U/2/4 To minimize output offset voltage and increase circuit accuracy, the resistor values need to meet the conditions: EQUATION 4-3: R VIN + = R VIN – 4.7.2 COMPENSATING FOR THE PARASITIC CAPACITANCE In analog circuit design, the PCB parasitic capacitance can compromise the circuit behavior; Figure 4-9 shows a typical scenario.
MCP6231/1R/1U/2/4 5.0 DESIGN AIDS Microchip provides the basic design tools needed for the MCP6231/1R/1U/2/4 family of op amps. 5.1 SPICE Macro Model The latest SPICE macro model for the MCP6231/1R/ 1U/2/4 op amps is available on the Microchip web site at www.microchip.com. This model is intended to be an initial design tool that works well in the op amp’s linear region of operation over the temperature range. See the model file for information on its capabilities.
MCP6231/1R/1U/2/4 NOTES: DS21881E-page 16 © 2009 Microchip Technology Inc.
MCP6231/1R/1U/2/4 6.0 PACKAGING INFORMATION 6.1 Package Marking Information 5-Lead SC70 (MCP6231U Only) Example: XXNN AS25 Example: 5-Lead SOT-23 5 XXNN 1 Device 4 2 3 Code MCP6231 BJNN MCP6231R BKNN MCP6231U BLNN Note: 8-Lead DFN (2 x 3) (MCP6231) XXX YWW NNN Applies to 5-Lead SOT-23. 5 4 BJ25 1 2 3 Example: AER 929 256 8-Lead TDFN (2 x 3) (MCP6232) Example: AAE 929 256 XXX YWW NNN Example: 8-Lead MSOP XXXXXX 6232E YWWNNN 929256 Legend: XX...
MCP6231/1R/1U/2/4 Package Marking Information (Continued) 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW 8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW NNN 14-Lead PDIP (300 mil) (MCP6234) Example: MCP6232 E/P256 0929 MCP6232 E/P e3 256 0929 OR Example: MCP6232 E/SN0929 256 MCP6232E SN e3 0929 256 OR Example: XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN 14-Lead SOIC (150 mil) (MCP6234) MCP6234 e3 E/P^^ 0929256 Example: MCP6234 e3 E/SL^^ 0929256 XXXXXXXXXX XXXXXXXXXX YYWWNNN 14-Lead TSSOP (MCP6234) Example:
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MCP6231/1R/1U/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2009 Microchip Technology Inc.
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MCP6231/2/4 APPENDIX A: REVISION HISTORY Revision E (August 2009) The following is the list of modifications: 1. 2. 3. 4. 5. 6. Added the 2x3 TDFN package for MCP6232. Updated the 2x3 DFN package information for MCP6231. Updated the “Temperature Characteristics” table. Updated Section 3.0 “Pin Descriptions”. Updated the Package Outline Drawings in Section 6.0 “Packaging Information”. Updated the Product Identification Systems section.
MCP6231/2/4 NOTES: DS21881E-page 36 © 2009 Microchip Technology Inc.
MCP6231/2/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO.
MCP6231/2/4 NOTES: DS21881E-page 38 © 2009 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
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