Datasheet
MCP6231/1R/1U/2/4
DS21881E-page 12 © 2009 Microchip Technology Inc.
A significant amount of current can flow out of the
inputs when the common mode voltage (V
CM
) is below
ground (V
SS
); see Figure 2-19. Applications that are
high impedance may need to limit the usable voltage
range.
4.1.3 NORMAL OPERATION
The input stage of the MCP6231/1R/1U/2/4 op amps
use two differential CMOS input stages in parallel. One
operates at low common mode input voltage (V
CM
),
while the other operates at high V
CM
. WIth this
topology, the device operates with V
CM
up to 0.3V
above V
DD
and 0.3V below V
SS
.
4.2 Rail-to-Rail Output
The output voltage range of the MCP6231/1R/1U/2/4
op amps is V
DD
– 35 mV (maximum) and V
SS
+ 35 mV
(minimum) when R
L
=10kΩ is connected to V
DD
/2 and
V
DD
= 5.5V. Refer to Figure 2-14 for more information.
4.3 Capacitive Loads
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. A unity-gain buffer (G = +1) is the most
sensitive to capacitive loads, but all gains show the
same general behavior.
When driving large capacitive loads with these op
amps (e.g., > 60 pF when G = +1), a small series
resistor at the output (R
ISO
in Figure 4-4) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitive load.
FIGURE 4-4: Output resistor, R
ISO
stabilizes large capacitive loads.
Figure 4-5 gives recommended R
ISO
values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (C
L
/G
N
), where G
N
is the
circuit’s noise gain. For non-inverting gains, G
N
and the
signal gain are equal. For inverting gains, G
N
is
1 + |Signal Gain| (e.g., –1 V/V gives G
N
= +2 V/V).
FIGURE 4-5: Recommended R
ISO
Values
for Capacitive Loads.
After selecting R
ISO
for your circuit, double-check the
resulting frequency response peaking and step
response overshoot. Evaluation on the bench and
simulations with the MCP6231/1R/1U/2/4 SPICE
macro model are very helpful. Modify R
ISO
’s value until
the response is reasonable.
4.4 Supply Bypass
With this op amp, the power supply pin (V
DD
for
single-supply) should have a local bypass capacitor
(i.e., 0.01 µF to 0.1 µF) within 2 mm for good
high-frequency performance. It can use a bulk
capacitor (i.e., 1 µF or larger) within 100 mm to
provide large, slow currents. This bulk capacitor can
be shared with other nearby analog parts.
4.5 Unused Op Amps
An unused op amp in a quad package (MCP6234)
should be configured as shown in Figure 4-6. Both
circuits prevent the output from toggling and causing
crosstalk. Circuit A can use any reference voltage
between the supplies, provides a buffered DC voltage
and minimizes the supply current draw of the unused
op amp. Circuit B minimizes the number of
components, but may draw a little more supply current
for the unused op amp.
FIGURE 4-6: Unused Op Amps.
V
IN
R
ISO
V
OUT
MCP623X
C
L
–
+
100
1,000
10,000
10 100 1000 10000
Normalized Load Capacitance; C
L
/G
N
(F)
Recommended R
ISO
(Ω)
G
N
= 1 V/V
G
N
= 2 V/V
G
N
≥
4 V/V
10p 100p 1n 10n
10k
1k
100
V
DD
V
DD
¼ MCP6234 (A) ¼ MCP6234 (B)
R
1
R
2
V
DD
V
REF
V
REF
V
DD
R
2
R
1
R
2
+
--------------------
⋅
=