Datasheet
© 2009-2011 Microchip Technology Inc. DS22188C-page 5
MCP621/1S/2/3/4/5/9
TABLE 1-3: DIGITAL ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.5V to +5.5V, V
SS
= GND, V
CM
= V
DD
/2,
V
OUT
≈ V
DD
/2, V
L
= V
DD
/2, R
L
= 2 kΩ to V
L
, C
L
= 50 pF and CAL/CS =V
SS
(refer to Figure 1-1 and Figure 1-2).
Parameters Sym Min Typ Max Units Conditions
CAL/CS
Low Specifications
CAL/CS
Logic Threshold, Low V
IL
V
SS
—0.2V
DD
V
CAL/CS
Input Current, Low I
CSL
—0—nACAL/CS = 0V
CAL/CS
High Specifications
CAL/CS
Logic Threshold, High V
IH
0.8V
DD
V
DD
V
CAL/CS
Input Current, High I
CSH
— 0.7 — µA CAL/CS = V
DD
GND Current I
SS
-3.5 -1.8 — µA Single, CAL/CS = V
DD
= 2.5V
I
SS
-8 -4 — µA Single, CAL/CS = V
DD
= 5.5V
I
SS
-5 -2.5 — µA Dual, CAL/CS = V
DD
= 2.5V
I
SS
-10 -5 — µA Dual, CAL/CS = V
DD
= 5.5V
CAL/CS
Internal Pull-Down
Resistor
R
PD
—5—MΩ
Amplifier Output Leakage I
O(LEAK)
— 50 — nA CAL/CS = V
DD
, T
A
= 125°C
POR Dynamic Specifications
V
DD
Low to Amplifier Off Time
(output goes High-Z)
t
POFF
— 200 — ns G = +1 V/V, V
L
= V
SS
,
V
DD
= 2.5V to 0V step to V
OUT
=0.1
(2.5V)
V
DD
High to Amplifier On Time
(including calibration)
t
PON
100 200 300 ms G = +1 V/V, V
L
= V
SS
,
V
DD
= 0V to 2.5V step to V
OUT
=0.9
(2.5V)
CAL/CS Dynamic Specifications
CAL/CS
Input Hysteresis V
HYST
—
0.25
—
V
CAL/CS Setup Time
(between CAL/CS
edges)
t
CSU
1——µsG = +1V/V, V
L
= V
SS
(Notes 2, 3, 4)
CAL/CS
= 0.8V
DD
to V
OUT
= 0.1
(V
DD
/2)
CAL/CS
High to Amplifier Off Time
(output goes High-Z)
t
COFF
— 200 — ns G = +1 V/V, V
L
= V
SS
,
CAL/CS
= 0.8V
DD
to V
OUT
= 0.1
(V
DD
/2)
CAL/CS
Low to Amplifier On Time
(including calibration)
t
CON
—3 4ms
G = +1 V/V, V
L
= V
SS
, MCP621 and
MCP625, CAL/CS
= 0.2V
DD
to
V
OUT
=0.9(V
DD
/2)
t
CON
—6 8ms
G = +1 V/V, V
L
= V
SS
, MCP629,
CAL/CS
= 0.2V
DD
to
V
OUT
=0.9(V
DD
/2)
Note 1: The MCP622 single, MCP625 dual and MCP629 quad have their CAL/CS inputs internally pulled down to V
SS
(0V).
2: This time ensures that the internal logic recognizes the edge. However, for the rising edge case, if CAL/CS
is raised
before the calibration is complete, the calibration will be aborted and the part will return to Low-Power mode.
3: For the MCP625 dual, there is an additional constraint. CAL
A/CSA and CALB/CSB can be toggled simultaneously
(within a time much smaller than t
CSU
) to make both op amps perform the same function simultaneously. If they are
toggled independently, then CAL
A/CSA (CALB/CSB) cannot be allowed to toggle while op amp B (op amp A) is in
Calibration mode; allow more than the maximum t
CON
time (4 ms) before the other side is toggled.
4: For the MCP629 quad, there is an additional constraint. CAL
AD/CSAD and CALBC/CSBC can be toggled simultaneously
(within a time much smaller than t
CSU
) to make all four op amps perform the same function simultaneously, and the
maximum t
CON
time is approximately doubled (8 ms). If they are toggled independently, then CALAD/CSAD
(CAL
BC/CSBC) cannot be allowed to toggle while op amps B and C (op amps A and D) are in Calibration mode; allow
more than the maximum t
CON
time (8 ms) before the other side is toggled.